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diff for duplicates of <20120511094625.GA11750@amd.com>

diff --git a/a/1.txt b/N1/1.txt
index 3a9cccd..bfeb7ab 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -6,9 +6,9 @@ On Thu, May 10, 2012 at 02:08:33PM -0600, Stephen Warren wrote:
 > > overlapping of register range between SMMU and MC. SMMU register
 > > offset needs to be calculated correctly, based on its register bank.
 > > 
-> > Signed-off-by: Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+> > Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
 > 
-> Acked-by: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
+> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
 > 
 > I expect patch 1 will go through the IOMMU tree, and I'll take patch 2
 > through the Tegra tree.
diff --git a/a/content_digest b/N1/content_digest
index 15d7e95..81eb4e7 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,23 +1,22 @@
  "ref\01336636221-31575-1-git-send-email-hdoyu@nvidia.com\0"
  "ref\01336636221-31575-2-git-send-email-hdoyu@nvidia.com\0"
  "ref\04FAC2041.7030405@wwwdotorg.org\0"
- "ref\04FAC2041.7030405-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org\0"
- "From\0Joerg Roedel <joerg.roedel-5C7GfCeVMHo@public.gmane.org>\0"
+ "From\0Joerg Roedel <joerg.roedel@amd.com>\0"
  "Subject\0Re: [PATCH 1/2] iommu/tegra: smmu: Add device tree support for SMMU\0"
  "Date\0Fri, 11 May 2012 11:46:25 +0200\0"
- "To\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\0"
- "Cc\0Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>"
-  linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
-  Rob Herring <rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org>
-  Rob Landley <rob-VoJi6FS/r0vR7s880joybQ@public.gmane.org>
-  Ohad Ben-Cohen <ohad-Ix1uc/W3ht7QT0dZR+AlfA@public.gmane.org>
-  Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
-  Jiri Kosina <jkosina-AlSwsSmVLrQ@public.gmane.org>
-  Thierry Reding <thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org>
-  devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
-  linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
- " linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0"
+ "To\0Stephen Warren <swarren@wwwdotorg.org>\0"
+ "Cc\0Hiroshi DOYU <hdoyu@nvidia.com>"
+  <linux-tegra@vger.kernel.org>
+  Grant Likely <grant.likely@secretlab.ca>
+  Rob Herring <rob.herring@calxeda.com>
+  Rob Landley <rob@landley.net>
+  Ohad Ben-Cohen <ohad@wizery.com>
+  Tony Lindgren <tony@atomide.com>
+  Jiri Kosina <jkosina@suse.cz>
+  Thierry Reding <thierry.reding@avionic-design.de>
+  <devicetree-discuss@lists.ozlabs.org>
+  <linux-doc@vger.kernel.org>
+ " <linux-kernel@vger.kernel.org>\0"
  "\00:1\0"
  "b\0"
  "On Thu, May 10, 2012 at 02:08:33PM -0600, Stephen Warren wrote:\n"
@@ -28,9 +27,9 @@
  "> > overlapping of register range between SMMU and MC. SMMU register\n"
  "> > offset needs to be calculated correctly, based on its register bank.\n"
  "> > \n"
- "> > Signed-off-by: Hiroshi DOYU <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n"
+ "> > Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>\n"
  "> \n"
- "> Acked-by: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\n"
+ "> Acked-by: Stephen Warren <swarren@wwwdotorg.org>\n"
  "> \n"
  "> I expect patch 1 will go through the IOMMU tree, and I'll take patch 2\n"
  "> through the Tegra tree.\n"
@@ -48,4 +47,4 @@
  "General Managers: Alberto Bozzo\n"
  Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632
 
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+4405165cf922a6893fbfc17eb10e6f9510502d1d215655da7ad371c0b88c4940

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