From mboxrd@z Thu Jan 1 00:00:00 1970 From: "joerg.roedel-5C7GfCeVMHo@public.gmane.org" Subject: Re: [PATCH 1/1] iommu/tegra: smmu: Add DMA window parser Date: Mon, 21 May 2012 14:47:07 +0200 Message-ID: <20120521124707.GC2604@amd.com> References: <20120518085051.4a0fca863c5ab37cf8d42cb1@nvidia.com> <1337323393-1035-1-git-send-email-hdoyu@nvidia.com> <4FB66796.1030007@wwwdotorg.org> <20120518.235619.175499431618565933.hdoyu@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <20120518.235619.175499431618565933.hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: Hiroshi Doyu Cc: "arnd-r2nGTMty4D4@public.gmane.org" , "swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org" , "devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org" , "thierry.reding-RM9K5IK7kjKj5M59NBduVrNAH6kLmebB@public.gmane.org" , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org" , "grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org" , "iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org" , "linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" List-Id: iommu@lists.linux-foundation.org On Fri, May 18, 2012 at 10:56:19PM +0200, Hiroshi Doyu wrote: > Joerg, as Stephen proposed originally. Could you please revert or drop > the original one this time? > > [PATCH 1/2] iommu/tegra: smmu: Add device tree support for SMMU I removed the patch from my tree. Regards, Joerg -- AMD Operating System Research Center Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach General Managers: Alberto Bozzo Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755418Ab2EUMrM (ORCPT ); Mon, 21 May 2012 08:47:12 -0400 Received: from ch1ehsobe006.messaging.microsoft.com ([216.32.181.186]:7707 "EHLO ch1outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754943Ab2EUMrL (ORCPT ); Mon, 21 May 2012 08:47:11 -0400 X-SpamScore: -19 X-BigFish: VPS-19(zz1432N98dKzz1202hzz15d4Rz2dh668h839h944hd25he5bhf0ah) X-Forefront-Antispam-Report: CIP:163.181.249.108;KIP:(null);UIP:(null);IPV:NLI;H:ausb3twp01.amd.com;RD:none;EFVD:NLI X-WSS-ID: 0M4DI6E-01-1YD-02 X-M-MSG: Date: Mon, 21 May 2012 14:47:07 +0200 From: "joerg.roedel@amd.com" To: Hiroshi Doyu CC: "swarren@wwwdotorg.org" , "arnd@arndb.de" , "iommu@lists.linux-foundation.org" , "linux-tegra@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "grant.likely@secretlab.ca" , "rob.herring@calxeda.com" , "thierry.reding@avionic-design.de" , "devicetree-discuss@lists.ozlabs.org" Subject: Re: [PATCH 1/1] iommu/tegra: smmu: Add DMA window parser Message-ID: <20120521124707.GC2604@amd.com> References: <20120518085051.4a0fca863c5ab37cf8d42cb1@nvidia.com> <1337323393-1035-1-git-send-email-hdoyu@nvidia.com> <4FB66796.1030007@wwwdotorg.org> <20120518.235619.175499431618565933.hdoyu@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20120518.235619.175499431618565933.hdoyu@nvidia.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-OriginatorOrg: amd.com Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 18, 2012 at 10:56:19PM +0200, Hiroshi Doyu wrote: > Joerg, as Stephen proposed originally. Could you please revert or drop > the original one this time? > > [PATCH 1/2] iommu/tegra: smmu: Add device tree support for SMMU I removed the patch from my tree. Regards, Joerg -- AMD Operating System Research Center Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach General Managers: Alberto Bozzo Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632