From: Sascha Hauer <s.hauer@pengutronix.de>
To: Alexey Galakhov <agalakhov@gmail.com>
Cc: barebox@lists.infradead.org
Subject: Re: [PATCHv4 6/7] S5P DRAM support
Date: Tue, 22 May 2012 20:29:46 +0200 [thread overview]
Message-ID: <20120522182946.GL30400@pengutronix.de> (raw)
In-Reply-To: <4FBB59AC.6050202@gmail.com>
On Tue, May 22, 2012 at 03:17:32PM +0600, Alexey Galakhov wrote:
> On 22.05.2012 02:02, Sascha Hauer wrote:
> > On Fri, May 18, 2012 at 03:43:30PM +0600, Alexey Galakhov wrote:
> >> +void __bare_init s5p_init_dram_bank(uint32_t base, uint32_t mc0, uint32_t mc1)
> >> +{
> >> +#ifdef S5P_DRAM_LPDDR
> >> + uint32_t reg = 0x100;
> >> +#endif
> >> +#ifdef S5P_DRAM_LPDDR2
> >> + uint32_t reg = 0x200;
> >> +#endif
> >> +#ifdef S5P_DRAM_DDR2
> >> + uint32_t reg = 0x400;
> >> +#endif
> >> + reg |= (S5P_DRAM_BURST) << 20;
> >> +#ifdef S5P_DRAM_16BIT
> >> + reg |= 0x1000;
> >> +#else /* 32-bit */
> >> + reg |= 0x2000;
> >> +#endif
> >
> > Since this function is called from board specific code, can we pass in
> > the DDR/DDR2 16BIT/32BIT settings as arguments to this function and
> > get rid of these ifdefs?
> >
> > Sascha
>
> Thank you for the question. Most likely not.
>
> According to the datasheet, LPDDR/LPDDR2/DDR2 initialization sequence is
> completely different. It is in init_seq() function. Since I have no
> LPDDR(2) hardware to test, I coded the DDR2 version only. A runtime
> switch like that:
>
> switch(mode) {
> case LPDDR:
> lpddr_init_seq();
> break;
> case LPDDR2:
> lpddr2_init_seq();
> break;
> case DDR2:
> ddr2_init_seq();
> break;
> }
>
> is too expensive for S5PV210's __bare_init which is very limited in
> space. Thus it is better to have only one function compiled in.
I see. In this case you could provide a s5p_init_dram_bank_ddr2 which
does the setup for ddr2 ram. The linker will then throw away any other
eventually compiled in s5p_init_dram_bank_* function. Code common to
all sdram setup functions could still be shared without overhead.
Sascha
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next prev parent reply other threads:[~2012-05-22 18:29 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-15 13:20 [PATCHv3 0/7] Cleaned up version of S5PV210 code Alexey Galakhov
2012-05-15 13:20 ` [PATCH 1/7] Make S3C24xx config options available for all S3Cs Alexey Galakhov
2012-05-15 13:20 ` [PATCH 2/7] Split S3C generic and S3C24xx specific code Alexey Galakhov
2012-05-17 17:52 ` Sascha Hauer
2012-05-17 18:33 ` Alexey Galakhov
2012-05-17 19:49 ` Juergen Beisert
2012-05-18 6:49 ` Alexey Galakhov
2012-05-18 8:38 ` Sascha Hauer
2012-05-18 9:06 ` Alexey Galakhov
2012-05-18 8:35 ` Sascha Hauer
2012-05-18 9:43 ` [PATCHv4 0/7] S5PV210 support (upd.) Alexey Galakhov
2012-05-18 9:43 ` [PATCH 1/7] Make S3C24xx config options available for all S3Cs Alexey Galakhov
2012-05-18 9:43 ` [PATCHv4 2/7] Split S3C generic and S3C24xx specific code Alexey Galakhov
2012-05-18 9:43 ` [PATCH 3/7] Add support for Samsung S5P architecture (S5PV210) Alexey Galakhov
2012-05-18 9:43 ` [PATCH 4/7] S5P boot header and image generator Alexey Galakhov
2012-05-18 9:43 ` [PATCHv4 5/7] S5P lowlevel clock init Alexey Galakhov
2012-05-18 9:43 ` [PATCHv4 6/7] S5P DRAM support Alexey Galakhov
2012-05-21 20:02 ` Sascha Hauer
2012-05-22 9:17 ` Alexey Galakhov
2012-05-22 18:29 ` Sascha Hauer [this message]
2012-05-22 19:12 ` Alexey Galakhov
2012-05-18 9:43 ` [PATCHv4 7/7] Add FriendlyArm Tiny210 board (S5PV210) Alexey Galakhov
2012-05-21 20:00 ` [PATCHv4 0/7] S5PV210 support (upd.) Sascha Hauer
2012-05-22 9:18 ` Alexey Galakhov
2012-05-15 13:20 ` [PATCH 3/7] Add support for Samsung S5P architecture (S5PV210) Alexey Galakhov
2012-05-15 13:20 ` [PATCH 4/7] S5P boot header and image generator Alexey Galakhov
2012-05-15 13:20 ` [PATCH 5/7] S5P lowlevel clock init Alexey Galakhov
2012-05-15 13:20 ` [PATCH 6/7] S5P DRAM support Alexey Galakhov
2012-05-15 13:20 ` [PATCH 7/7] Add FriendlyArm Tiny210 board (S5PV210) Alexey Galakhov
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