From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 13/14] drm/i915: add some barriers when changing DIPs Date: Wed, 30 May 2012 23:08:21 +0200 Message-ID: <20120530210821.GI6888@phenom.ffwll.local> References: <1338234182-5021-1-git-send-email-przanoni@gmail.com> <1338234182-5021-14-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wg0-f43.google.com (mail-wg0-f43.google.com [74.125.82.43]) by gabe.freedesktop.org (Postfix) with ESMTP id 6C5999EF68 for ; Wed, 30 May 2012 14:06:56 -0700 (PDT) Received: by wgbdr1 with SMTP id dr1so191335wgb.12 for ; Wed, 30 May 2012 14:06:55 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1338234182-5021-14-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org On Mon, May 28, 2012 at 04:43:00PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > On IVB and older, we basically have two registers: the control and the > data register. We write a few consecutitve times to the control > register, and we need these writes to arrive exactly in the specified > order. > > Also, when we're changing the data register, we need to guarantee that > anything written to the control register already arrived (since > changing the control register can change where the data register > points to). Also, we need to make sure all the writes to the data > register happen exactly in the specified order, and we also *can't* > read the data register during this process, since reading and/or > writing it will change the place it points to. > > So invoke the "better safe than sorry" rule and just be careful and > put barriers everywhere :) > > On HSW we still have a control register that we write many times, but > we have many data registers. > > Demanded-by: Chris Wilson > Signed-off-by: Paulo Zanoni Ok, I've all patches from this series for -next safe for the patches 10, 12 and 14: - for 14 I've already dumped a bikeshed - 10 and 12 I like, but I fear we'll get too many merge conflicts against -fixes if I merge them this early. I'd still like to include them for 3.6, so can you please resend these two later in the 3.5 cycle, when things have settled a bit for -fixes? Thanks a lot for digging into this infoframe maze. Cheers, Daniel -- Daniel Vetter Mail: daniel@ffwll.ch Mobile: +41 (0)79 365 57 48