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From: Paul Brook <paul@codesourcery.com>
To: John Williams <john.williams@petalogix.com>
Cc: "Peter A. G. Crosthwaite" <peter.crosthwaite@petalogix.com>,
	edgar.iglesias@gmail.com, stefanha@gmail.com,
	qemu-devel@nongnu.org, peter.maydell@linaro.org
Subject: Re: [Qemu-devel] [PATCH V4 0/5] Ehnahced SSI bus support + M25P80 SPI flash + Xilinx SPI controller
Date: Wed, 6 Jun 2012 14:18:52 +0100	[thread overview]
Message-ID: <201206061418.53159.paul@codesourcery.com> (raw)
In-Reply-To: <CACPZLaX5WN3Z6FtmiruYG5tQ1pmG1gCAUv5a3H+hb3S+MkCfCg@mail.gmail.com>

> On 5th April, when we first RFC'd our SPI layer support, you said to Peter:
> 
> ==
> I don't believe there is any difference between SSI and SPI.  It's the
> exact same thing - the same way that many devices support a "two-wire
> interface" that is actually just I2C with a different name.
> 
> The behavior of the CS pin varies between devices.  It sounds like you need
> a bit of extra logic not present in the current ssi code.  You should fix
> that, not invent a whole new bus.
> ==
> 
> He's gone and done exactly that, indeed generalised it with the
> proposed changes to SSI.

No.  There are two changes.  Modelling the CS line in the SPI bus, and having 
SSI be a multipoint bus rather than point-point.

Paul

      reply	other threads:[~2012-06-06 13:19 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-06-04  8:08 [Qemu-devel] [PATCH V4 0/5] Ehnahced SSI bus support + M25P80 SPI flash + Xilinx SPI controller Peter A. G. Crosthwaite
2012-06-04  8:08 ` [Qemu-devel] [PATCH V4 1/5] SSI: Built in multiple device support Peter A. G. Crosthwaite
2012-06-04  8:08 ` [Qemu-devel] [PATCH V4 2/5] m25p80: initial verion Peter A. G. Crosthwaite
2012-06-04  8:08 ` [Qemu-devel] [PATCH V4 3/5] xilinx_spi: initial version Peter A. G. Crosthwaite
2012-06-04  8:08 ` [Qemu-devel] [PATCH V4 4/5] petalogix-ml605: added spi controller with m25p80 Peter A. G. Crosthwaite
2012-06-04  8:08 ` [Qemu-devel] [PATCH V4 5/5] stellaris: Updated spi bus implementation Peter A. G. Crosthwaite
2012-06-04  8:14   ` Peter Crosthwaite
2012-06-05  1:34 ` [Qemu-devel] [PATCH V4 0/5] Ehnahced SSI bus support + M25P80 SPI flash + Xilinx SPI controller Paul Brook
2012-06-05  1:54   ` Peter Crosthwaite
2012-06-06 13:37     ` Paul Brook
2012-06-05  2:51   ` John Williams
2012-06-06 13:18     ` Paul Brook [this message]

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