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From: Greg KH <gregkh@linuxfoundation.org>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: torvalds@linux-foundation.org, akpm@linux-foundation.org,
	alan@lxorguk.ukuu.org.uk,
	Mark Brown <broonie@opensource.wolfsonmicro.com>
Subject: [ 24/42] ASoC: wm8994: Apply volume updates with clocks enabled
Date: Thu, 14 Jun 2012 16:56:47 -0700	[thread overview]
Message-ID: <20120614235626.030837885@linuxfoundation.org> (raw)
In-Reply-To: <20120614235636.GA5275@kroah.com>

3.4-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Mark Brown <broonie@opensource.wolfsonmicro.com>

commit bfd37bb5f681961e255fd2f346c20fdae2ef3f27 upstream.

Volume updates may not be acted upon if there is no clock applied when
the volume update is written. Ensure this doesn't happen by writing out
registers with volume updates after we enable each of the clocks.

There are more registers updated than before as previously we were
relying on wm_hubs to set those for controls it manages.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 sound/soc/codecs/wm8994.c |   93 ++++++++++++++++++++++++++++------------------
 1 file changed, 58 insertions(+), 35 deletions(-)

--- a/sound/soc/codecs/wm8994.c
+++ b/sound/soc/codecs/wm8994.c
@@ -46,6 +46,39 @@
 #define WM8994_NUM_DRC 3
 #define WM8994_NUM_EQ  3
 
+static struct {
+	unsigned int reg;
+	unsigned int mask;
+} wm8994_vu_bits[] = {
+	{ WM8994_LEFT_LINE_INPUT_1_2_VOLUME, WM8994_IN1_VU },
+	{ WM8994_RIGHT_LINE_INPUT_1_2_VOLUME, WM8994_IN1_VU },
+	{ WM8994_LEFT_LINE_INPUT_3_4_VOLUME, WM8994_IN2_VU },
+	{ WM8994_RIGHT_LINE_INPUT_3_4_VOLUME, WM8994_IN2_VU },
+	{ WM8994_SPEAKER_VOLUME_LEFT, WM8994_SPKOUT_VU },
+	{ WM8994_SPEAKER_VOLUME_RIGHT, WM8994_SPKOUT_VU },
+	{ WM8994_LEFT_OUTPUT_VOLUME, WM8994_HPOUT1_VU },
+	{ WM8994_RIGHT_OUTPUT_VOLUME, WM8994_HPOUT1_VU },
+	{ WM8994_LEFT_OPGA_VOLUME, WM8994_MIXOUT_VU },
+	{ WM8994_RIGHT_OPGA_VOLUME, WM8994_MIXOUT_VU },
+
+	{ WM8994_AIF1_DAC1_LEFT_VOLUME, WM8994_AIF1DAC1_VU },
+	{ WM8994_AIF1_DAC1_RIGHT_VOLUME, WM8994_AIF1DAC1_VU },
+	{ WM8994_AIF1_DAC2_LEFT_VOLUME, WM8994_AIF1DAC2_VU },
+	{ WM8994_AIF1_DAC2_RIGHT_VOLUME, WM8994_AIF1DAC2_VU },
+	{ WM8994_AIF2_DAC_LEFT_VOLUME, WM8994_AIF2DAC_VU },
+	{ WM8994_AIF2_DAC_RIGHT_VOLUME, WM8994_AIF2DAC_VU },
+	{ WM8994_AIF1_ADC1_LEFT_VOLUME, WM8994_AIF1ADC1_VU },
+	{ WM8994_AIF1_ADC1_RIGHT_VOLUME, WM8994_AIF1ADC1_VU },
+	{ WM8994_AIF1_ADC2_LEFT_VOLUME, WM8994_AIF1ADC2_VU },
+	{ WM8994_AIF1_ADC2_RIGHT_VOLUME, WM8994_AIF1ADC2_VU },
+	{ WM8994_AIF2_ADC_LEFT_VOLUME, WM8994_AIF2ADC_VU },
+	{ WM8994_AIF2_ADC_RIGHT_VOLUME, WM8994_AIF1ADC2_VU },
+	{ WM8994_DAC1_LEFT_VOLUME, WM8994_DAC1_VU },
+	{ WM8994_DAC1_RIGHT_VOLUME, WM8994_DAC1_VU },
+	{ WM8994_DAC2_LEFT_VOLUME, WM8994_DAC2_VU },
+	{ WM8994_DAC2_RIGHT_VOLUME, WM8994_DAC2_VU },
+};
+
 static int wm8994_drc_base[] = {
 	WM8994_AIF1_DRC1_1,
 	WM8994_AIF1_DRC2_1,
@@ -1006,6 +1039,7 @@ static int aif1clk_ev(struct snd_soc_dap
 	struct snd_soc_codec *codec = w->codec;
 	struct wm8994 *control = codec->control_data;
 	int mask = WM8994_AIF1DAC1L_ENA | WM8994_AIF1DAC1R_ENA;
+	int i;
 	int dac;
 	int adc;
 	int val;
@@ -1064,6 +1098,13 @@ static int aif1clk_ev(struct snd_soc_dap
 				    WM8994_AIF1DAC2L_ENA);
 		break;
 
+	case SND_SOC_DAPM_POST_PMU:
+		for (i = 0; i < ARRAY_SIZE(wm8994_vu_bits); i++)
+			snd_soc_write(codec, wm8994_vu_bits[i].reg,
+				      snd_soc_read(codec,
+						   wm8994_vu_bits[i].reg));
+		break;
+
 	case SND_SOC_DAPM_PRE_PMD:
 	case SND_SOC_DAPM_POST_PMD:
 		snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
@@ -1089,6 +1130,7 @@ static int aif2clk_ev(struct snd_soc_dap
 		      struct snd_kcontrol *kcontrol, int event)
 {
 	struct snd_soc_codec *codec = w->codec;
+	int i;
 	int dac;
 	int adc;
 	int val;
@@ -1139,6 +1181,13 @@ static int aif2clk_ev(struct snd_soc_dap
 				    WM8994_AIF2DACR_ENA);
 		break;
 
+	case SND_SOC_DAPM_POST_PMU:
+		for (i = 0; i < ARRAY_SIZE(wm8994_vu_bits); i++)
+			snd_soc_write(codec, wm8994_vu_bits[i].reg,
+				      snd_soc_read(codec,
+						   wm8994_vu_bits[i].reg));
+		break;
+
 	case SND_SOC_DAPM_PRE_PMD:
 	case SND_SOC_DAPM_POST_PMD:
 		snd_soc_update_bits(codec, WM8994_POWER_MANAGEMENT_5,
@@ -1587,9 +1636,11 @@ SND_SOC_DAPM_POST("Late Disable PGA", la
 
 static const struct snd_soc_dapm_widget wm8994_lateclk_widgets[] = {
 SND_SOC_DAPM_SUPPLY("AIF1CLK", WM8994_AIF1_CLOCKING_1, 0, 0, aif1clk_ev,
-		    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
+		    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
+		    SND_SOC_DAPM_PRE_PMD),
 SND_SOC_DAPM_SUPPLY("AIF2CLK", WM8994_AIF2_CLOCKING_1, 0, 0, aif2clk_ev,
-		    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
+		    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
+		    SND_SOC_DAPM_PRE_PMD),
 SND_SOC_DAPM_PGA("Direct Voice", SND_SOC_NOPM, 0, 0, NULL, 0),
 SND_SOC_DAPM_MIXER("SPKL", WM8994_POWER_MANAGEMENT_3, 8, 0,
 		   left_speaker_mixer, ARRAY_SIZE(left_speaker_mixer)),
@@ -3943,39 +3994,11 @@ static int wm8994_codec_probe(struct snd
 
 	pm_runtime_put(codec->dev);
 
-	/* Latch volume updates (right only; we always do left then right). */
-	snd_soc_update_bits(codec, WM8994_AIF1_DAC1_LEFT_VOLUME,
-			    WM8994_AIF1DAC1_VU, WM8994_AIF1DAC1_VU);
-	snd_soc_update_bits(codec, WM8994_AIF1_DAC1_RIGHT_VOLUME,
-			    WM8994_AIF1DAC1_VU, WM8994_AIF1DAC1_VU);
-	snd_soc_update_bits(codec, WM8994_AIF1_DAC2_LEFT_VOLUME,
-			    WM8994_AIF1DAC2_VU, WM8994_AIF1DAC2_VU);
-	snd_soc_update_bits(codec, WM8994_AIF1_DAC2_RIGHT_VOLUME,
-			    WM8994_AIF1DAC2_VU, WM8994_AIF1DAC2_VU);
-	snd_soc_update_bits(codec, WM8994_AIF2_DAC_LEFT_VOLUME,
-			    WM8994_AIF2DAC_VU, WM8994_AIF2DAC_VU);
-	snd_soc_update_bits(codec, WM8994_AIF2_DAC_RIGHT_VOLUME,
-			    WM8994_AIF2DAC_VU, WM8994_AIF2DAC_VU);
-	snd_soc_update_bits(codec, WM8994_AIF1_ADC1_LEFT_VOLUME,
-			    WM8994_AIF1ADC1_VU, WM8994_AIF1ADC1_VU);
-	snd_soc_update_bits(codec, WM8994_AIF1_ADC1_RIGHT_VOLUME,
-			    WM8994_AIF1ADC1_VU, WM8994_AIF1ADC1_VU);
-	snd_soc_update_bits(codec, WM8994_AIF1_ADC2_LEFT_VOLUME,
-			    WM8994_AIF1ADC2_VU, WM8994_AIF1ADC2_VU);
-	snd_soc_update_bits(codec, WM8994_AIF1_ADC2_RIGHT_VOLUME,
-			    WM8994_AIF1ADC2_VU, WM8994_AIF1ADC2_VU);
-	snd_soc_update_bits(codec, WM8994_AIF2_ADC_LEFT_VOLUME,
-			    WM8994_AIF2ADC_VU, WM8994_AIF1ADC2_VU);
-	snd_soc_update_bits(codec, WM8994_AIF2_ADC_RIGHT_VOLUME,
-			    WM8994_AIF2ADC_VU, WM8994_AIF1ADC2_VU);
-	snd_soc_update_bits(codec, WM8994_DAC1_LEFT_VOLUME,
-			    WM8994_DAC1_VU, WM8994_DAC1_VU);
-	snd_soc_update_bits(codec, WM8994_DAC1_RIGHT_VOLUME,
-			    WM8994_DAC1_VU, WM8994_DAC1_VU);
-	snd_soc_update_bits(codec, WM8994_DAC2_LEFT_VOLUME,
-			    WM8994_DAC2_VU, WM8994_DAC2_VU);
-	snd_soc_update_bits(codec, WM8994_DAC2_RIGHT_VOLUME,
-			    WM8994_DAC2_VU, WM8994_DAC2_VU);
+	/* Latch volume update bits */
+	for (i = 0; i < ARRAY_SIZE(wm8994_vu_bits); i++)
+		snd_soc_update_bits(codec, wm8994_vu_bits[i].reg,
+				    wm8994_vu_bits[i].mask,
+				    wm8994_vu_bits[i].mask);
 
 	/* Set the low bit of the 3D stereo depth so TLV matches */
 	snd_soc_update_bits(codec, WM8994_AIF1_DAC1_FILTERS_2,



  parent reply	other threads:[~2012-06-15  0:05 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-06-14 23:56 [ 00/42] 3.4.3-stable review Greg KH
2012-06-14 23:56 ` [ 01/42] drm/nouveau/disp: fix dithering not being enabled on some eDP macbooks Greg KH
2012-06-14 23:56 ` [ 02/42] drm/i915: Reset last_retired_head when resetting ring Greg KH
2012-06-14 23:56 ` [ 03/42] char/agp: add another Ironlake host bridge Greg KH
2012-06-14 23:56 ` [ 04/42] btree: fix tree corruption in btree_get_prev() Greg KH
2012-06-14 23:56 ` [ 05/42] powerpc/time: Sanity check of decrementer expiration is necessary Greg KH
2012-06-14 23:56 ` [ 06/42] powerpc: Fix kernel panic during kernel module load Greg KH
2012-06-14 23:56 ` [ 07/42] module_param: stop double-calling parameters Greg KH
2012-06-14 23:56 ` [ 08/42] timekeeping: Fix CLOCK_MONOTONIC inconsistency during leapsecond Greg KH
2012-06-14 23:56 ` [ 09/42] ext4: fix the free blocks calculation for ext3 file systems w/ uninit_bg Greg KH
2012-06-14 23:56 ` [ 10/42] x86/uv: Fix UV2 BAU legacy mode Greg KH
2012-06-14 23:56 ` [ 11/42] x86, MCE, AMD: Make APIC LVT thresholding interrupt optional Greg KH
2012-06-14 23:56 ` [ 12/42] hwrng: atmel-rng - fix race condition leading to repeated bits Greg KH
2012-06-14 23:56   ` Greg KH
2012-06-14 23:56 ` [ 13/42] crypto: aesni-intel - fix unaligned cbc decrypt for x86-32 Greg KH
2012-06-14 23:56   ` Greg KH
2012-06-14 23:56 ` [ 14/42] drm/ttm: Fix buffer object metadata accounting regression v2 Greg KH
2012-06-14 23:56 ` [ 15/42] Btrfs: fall back to non-inline if we dont have enough space Greg KH
2012-06-14 23:56 ` [ 16/42] iwlwifi: disable WoWLAN if !CONFIG_PM_SLEEP Greg KH
2012-06-14 23:56 ` [ 17/42] iwlwifi: unregister LEDs if mac80211 registration fails Greg KH
2012-06-14 23:56 ` [ 18/42] iwlwifi: dont mess up the SCD when removing a key Greg KH
2012-06-14 23:56 ` [ 19/42] iwlwifi: disable the buggy chain extension feature in HW Greg KH
2012-06-14 23:56 ` [ 20/42] mac80211: fix error in station state transitions during reconfig Greg KH
2012-06-14 23:56 ` [ 21/42] mac80211: clean up remain-on-channel on interface stop Greg KH
2012-06-14 23:56 ` [ 22/42] mac80211: fix non RCU-safe sta_list manipulation Greg KH
2012-06-14 23:56 ` [ 23/42] ASoC: wm8994: Ensure all AIFnCLK events are run from the _late variants Greg KH
2012-06-14 23:56 ` Greg KH [this message]
2012-06-14 23:56 ` [ 25/42] bcma: add ext PA workaround for BCM4331 and BCM43431 Greg KH
2012-06-14 23:56 ` [ 26/42] ALSA: HDA: Pin fixup for Zotac Z68 motherboard Greg KH
2012-06-14 23:56 ` [ 27/42] cfg80211: fix interface combinations check Greg KH
2012-06-14 23:56 ` [ 28/42] rt2x00: use atomic variable for seqno Greg KH
2012-06-14 23:56 ` [ 29/42] wireless: rt2x00: rt2800usb add more devices ids Greg KH
2012-06-14 23:56 ` [ 30/42] wireless: rt2x00: rt2800usb more devices were identified Greg KH
2012-06-14 23:56 ` [ 31/42] net: sierra_net: device IDs for Aircard 320U++ Greg KH
2012-06-14 23:56 ` [ 32/42] can: c_can: fix "BUG! echo_skb is occupied!" during transmit Greg KH
2012-06-14 23:56 ` [ 33/42] can: c_can: fix an interrupt thrash issue with c_can driver Greg KH
2012-06-14 23:56 ` [ 34/42] can: c_can: fix race condition in c_can_open() Greg KH
2012-06-14 23:56 ` [ 35/42] gma500: dont register the ACPI video bus Greg KH
2012-06-14 23:56 ` [ 36/42] acpi_video: fix leaking PCI references Greg KH
2012-06-14 23:57 ` [ 37/42] sched: Fix the relax_domain_level boot parameter Greg KH
2012-06-14 23:57 ` [ 38/42] drm/radeon: fix tiling and command stream checking on evergreen v3 Greg KH
2012-06-14 23:57 ` [ 39/42] drm/i915: Mark the ringbuffers as being in the GTT domain Greg KH
2012-06-14 23:57 ` [ 40/42] fuse: fix stat call on 32 bit platforms Greg KH
2012-06-14 23:57 ` [ 41/42] libata: add a host flag to ignore detected ATA devices Greg KH
2012-06-14 23:57 ` [ 42/42] ata_piix: defer disks to the Hyper-V drivers by default Greg KH
2012-06-15 11:16   ` From all Hyper-V admins: Big thanks! Re: [ 41/42] libata + [ 42/42] ata_piix: defer disks to the Hyper-V drivers by default has been added to the 3.4-stable tree Victor Miasnikov

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