From: andrew@lunn.ch (Andrew Lunn)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 3/9] arm: mach-mvebu: add source files
Date: Fri, 15 Jun 2012 12:07:34 +0200 [thread overview]
Message-ID: <20120615100734.GJ26034@lunn.ch> (raw)
In-Reply-To: <1339746250-26650-4-git-send-email-gregory.clement@free-electrons.com>
> +/* System controller registers */
> +#define MVEBU_RSTOUTN_MASK_OFFSET 0x60
> +#define MVEBU_RSTOUTN_MASK_RESET_OUT_EN 0x1
> +#define MVEBU_SYSTEM_SOFT_RESET_OFFSET 0x64
> +#define MVEBU_SYSTEM_SOFT_RESET 0x1
$ grep -hr "#define RSTOUTn "*
#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
#define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x108)
#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108)
$ grep -rh "#define SYSTEM_SOFT_RESET" *
#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
/* Orion5x also puts it at 0x10c, but has a different name! */
So, it looks like the Marvell ASIC engineers moved it for the latest
SoCs. Could you add a child property of marvell,system-controller
which indicates where within the system controller the reset
subcontroller is? Since the two registers are always next to each
other, we just need one address.
Thanks
Andrew
next prev parent reply other threads:[~2012-06-15 10:07 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-15 7:44 [PATCH v3] arm: Add basic support for new Marvell Armada 370 and Armada XP SoC Gregory Clement
2012-06-15 7:44 ` [PATCH v3 1/9] clocksource: time-armada-370-xp: Marvell Armada 370/XP SoC timer driver Gregory Clement
2012-06-15 9:09 ` Arnd Bergmann
2012-06-15 9:14 ` Gregory CLEMENT
2012-06-15 10:45 ` Andrew Lunn
2012-06-15 11:38 ` Gregory CLEMENT
2012-06-15 11:54 ` Andrew Lunn
2012-06-15 13:14 ` Nicolas Pitre
2012-06-15 7:44 ` [PATCH v3 2/9] arm: mach-mvebu: add header Gregory Clement
2012-06-15 7:44 ` [PATCH v3 3/9] arm: mach-mvebu: add source files Gregory Clement
2012-06-15 9:12 ` Arnd Bergmann
2012-06-15 10:07 ` Andrew Lunn [this message]
2012-06-15 18:13 ` Device Tree, abstraction of the SoC or the board? Thomas Petazzoni
2012-06-15 20:19 ` Arnd Bergmann
2012-06-15 7:44 ` [PATCH v3 4/9] arm: mach-mvebu: add support for Armada 370 and Armada XP with DT Gregory Clement
2012-06-15 7:44 ` [PATCH v3 5/9] arm: mach-mvebu: add documentation for new device tree bindings Gregory Clement
2012-06-15 9:14 ` Arnd Bergmann
2012-06-15 7:44 ` [PATCH v3 6/9] arm: mach-mvebu: add defconfig Gregory Clement
2012-06-15 7:44 ` [PATCH v3 7/9] arm: mach-mvebu: add compilation/configuration change Gregory Clement
2012-06-15 7:56 ` Andrew Lunn
2012-06-15 8:32 ` Gregory CLEMENT
2012-06-15 9:07 ` Arnd Bergmann
2012-06-15 7:44 ` [PATCH v3 8/9] arm: mach-mvebu: add entry to MAINTAINERS Gregory Clement
2012-06-15 7:44 ` [PATCH v3 9/9] ARM: mvebu: MPIC: read number of interrupts from control register Gregory Clement
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