From mboxrd@z Thu Jan 1 00:00:00 1970 From: arnd@arndb.de (Arnd Bergmann) Date: Tue, 17 Jul 2012 13:12:06 +0000 Subject: [PATCH 1/8] ARM: support for Moschip MCS814x SoCs In-Reply-To: <20120717121640.589780ce@skate> References: <1342363754-30808-1-git-send-email-florian@openwrt.org> <201207161554.04812.arnd@arndb.de> <20120717121640.589780ce@skate> Message-ID: <201207171312.06987.arnd@arndb.de> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Tuesday 17 July 2012, Thomas Petazzoni wrote: > Le Mon, 16 Jul 2012 15:54:04 +0000, > Arnd Bergmann a ?crit : > > > > +void mcs814x_restart(char mode, const char *cmd) > > > +{ > > > + __raw_writel(~(1 << 31), mcs814x_sysdbg_base); > > > +} > > > > You should generally avoid using __raw_readl etc. and instead use > > readl/write or readl_relaxed/writel_relaxed. > > I thought that readl/writel and readl_relaxed/writel_relaxed were used > for PCI-style access, for which these macros/functions do automatically > a conversion from the CPU-endianness to the PCI-endianness > (little-endian). Here of course, this the SoC is used little-endian, it > will just work because readl/writel will not do any endianness > conversion, but if we were on a big-endian machine? > > My understanding until now was that __raw_readl/__raw_writel should be > used for accesses with native endianness, but apparently, it's more > subtle than this. Would you mind expanding a bit on this? The __raw_* versions are basically only valid if you access a memory buffer, such as a video framebuffer. They do the conversion of an __iomem pointer into something that can be accessed by the compiler. The non-raw versions have fixed endianess, guarantee that the access is done atomically (could be byte-wise otherwise) and that all the necessary barriers are used to synchronize against DMA and out-of-order execution. We don't actually have accessors that are CPU-endian and guarantee that you can access an MMIO register properly. On powerpc, the convention is that readl/writel should only be used to access PCI, but that is for the enhanced error handling, not for endianess. Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arnd Bergmann Subject: Re: [PATCH 1/8] ARM: support for Moschip MCS814x SoCs Date: Tue, 17 Jul 2012 13:12:06 +0000 Message-ID: <201207171312.06987.arnd@arndb.de> References: <1342363754-30808-1-git-send-email-florian@openwrt.org> <201207161554.04812.arnd@arndb.de> <20120717121640.589780ce@skate> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20120717121640.589780ce@skate> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org Sender: "devicetree-discuss" To: Thomas Petazzoni Cc: Mike Turquette , Florian Fainelli , devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: devicetree@vger.kernel.org T24gVHVlc2RheSAxNyBKdWx5IDIwMTIsIFRob21hcyBQZXRhenpvbmkgd3JvdGU6Cj4gTGUgTW9u LCAxNiBKdWwgMjAxMiAxNTo1NDowNCArMDAwMCwKPiBBcm5kIEJlcmdtYW5uIDxhcm5kQGFybmRi LmRlPiBhIMOpY3JpdCA6Cj4gCj4gPiA+ICt2b2lkIG1jczgxNHhfcmVzdGFydChjaGFyIG1vZGUs IGNvbnN0IGNoYXIgKmNtZCkKPiA+ID4gK3sKPiA+ID4gKyAgIF9fcmF3X3dyaXRlbCh+KDEgPDwg MzEpLCBtY3M4MTR4X3N5c2RiZ19iYXNlKTsKPiA+ID4gK30KPiA+IAo+ID4gWW91IHNob3VsZCBn ZW5lcmFsbHkgYXZvaWQgdXNpbmcgX19yYXdfcmVhZGwgZXRjLiBhbmQgaW5zdGVhZCB1c2UKPiA+ IHJlYWRsL3dyaXRlIG9yIHJlYWRsX3JlbGF4ZWQvd3JpdGVsX3JlbGF4ZWQuCj4gCj4gSSB0aG91 Z2h0IHRoYXQgcmVhZGwvd3JpdGVsIGFuZCByZWFkbF9yZWxheGVkL3dyaXRlbF9yZWxheGVkIHdl cmUgdXNlZAo+IGZvciBQQ0ktc3R5bGUgYWNjZXNzLCBmb3Igd2hpY2ggdGhlc2UgbWFjcm9zL2Z1 bmN0aW9ucyBkbyBhdXRvbWF0aWNhbGx5Cj4gYSBjb252ZXJzaW9uIGZyb20gdGhlIENQVS1lbmRp YW5uZXNzIHRvIHRoZSBQQ0ktZW5kaWFubmVzcwo+IChsaXR0bGUtZW5kaWFuKS4gSGVyZSBvZiBj b3Vyc2UsIHRoaXMgdGhlIFNvQyBpcyB1c2VkIGxpdHRsZS1lbmRpYW4sIGl0Cj4gd2lsbCBqdXN0 IHdvcmsgYmVjYXVzZSByZWFkbC93cml0ZWwgd2lsbCBub3QgZG8gYW55IGVuZGlhbm5lc3MKPiBj b252ZXJzaW9uLCBidXQgaWYgd2Ugd2VyZSBvbiBhIGJpZy1lbmRpYW4gbWFjaGluZT8KPiAKPiBN eSB1bmRlcnN0YW5kaW5nIHVudGlsIG5vdyB3YXMgdGhhdCBfX3Jhd19yZWFkbC9fX3Jhd193cml0 ZWwgc2hvdWxkIGJlCj4gdXNlZCBmb3IgYWNjZXNzZXMgd2l0aCBuYXRpdmUgZW5kaWFubmVzcywg YnV0IGFwcGFyZW50bHksIGl0J3MgbW9yZQo+IHN1YnRsZSB0aGFuIHRoaXMuIFdvdWxkIHlvdSBt aW5kIGV4cGFuZGluZyBhIGJpdCBvbiB0aGlzPwoKVGhlIF9fcmF3XyogdmVyc2lvbnMgYXJlIGJh c2ljYWxseSBvbmx5IHZhbGlkIGlmIHlvdSBhY2Nlc3MgYSBtZW1vcnkKYnVmZmVyLCBzdWNoIGFz IGEgdmlkZW8gZnJhbWVidWZmZXIuIFRoZXkgZG8gdGhlIGNvbnZlcnNpb24gb2YgYW4KX19pb21l bSBwb2ludGVyIGludG8gc29tZXRoaW5nIHRoYXQgY2FuIGJlIGFjY2Vzc2VkIGJ5IHRoZSBjb21w aWxlci4KClRoZSBub24tcmF3IHZlcnNpb25zIGhhdmUgZml4ZWQgZW5kaWFuZXNzLCBndWFyYW50 ZWUgdGhhdCB0aGUgYWNjZXNzCmlzIGRvbmUgYXRvbWljYWxseSAoY291bGQgYmUgYnl0ZS13aXNl IG90aGVyd2lzZSkgYW5kIHRoYXQgYWxsIHRoZQpuZWNlc3NhcnkgYmFycmllcnMgYXJlIHVzZWQg dG8gc3luY2hyb25pemUgYWdhaW5zdCBETUEgYW5kIG91dC1vZi1vcmRlcgpleGVjdXRpb24uCgpX ZSBkb24ndCBhY3R1YWxseSBoYXZlIGFjY2Vzc29ycyB0aGF0IGFyZSBDUFUtZW5kaWFuIGFuZCBn dWFyYW50ZWUgdGhhdAp5b3UgY2FuIGFjY2VzcyBhbiBNTUlPIHJlZ2lzdGVyIHByb3Blcmx5LgoK T24gcG93ZXJwYywgdGhlIGNvbnZlbnRpb24gaXMgdGhhdCByZWFkbC93cml0ZWwgc2hvdWxkIG9u bHkgYmUgdXNlZAp0byBhY2Nlc3MgUENJLCBidXQgdGhhdCBpcyBmb3IgdGhlIGVuaGFuY2VkIGVy cm9yIGhhbmRsaW5nLCBub3QgZm9yCmVuZGlhbmVzcy4KCglBcm5kCl9fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmRldmljZXRyZWUtZGlzY3VzcyBtYWlsaW5n IGxpc3QKZGV2aWNldHJlZS1kaXNjdXNzQGxpc3RzLm96bGFicy5vcmcKaHR0cHM6Ly9saXN0cy5v emxhYnMub3JnL2xpc3RpbmZvL2RldmljZXRyZWUtZGlzY3Vzcwo=