From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marcelo Tosatti Subject: Re: [PATCH] KVM: PIC: call ack notifiers for irqs that are dropped form irr Date: Tue, 24 Jul 2012 09:40:26 -0300 Message-ID: <20120724124026.GC4387@amt.cnet> References: <20120717115910.GG6345@redhat.com> <20120724123514.GI26120@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: kvm@vger.kernel.org, avi@redhat.com To: Gleb Natapov Return-path: Received: from mx1.redhat.com ([209.132.183.28]:36983 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753812Ab2GXMka (ORCPT ); Tue, 24 Jul 2012 08:40:30 -0400 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id q6OCeT23002799 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Tue, 24 Jul 2012 08:40:29 -0400 Content-Disposition: inline In-Reply-To: <20120724123514.GI26120@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On Tue, Jul 24, 2012 at 03:35:14PM +0300, Gleb Natapov wrote: > Ping. Is some additional work expected from me before this is applied? Still not clear to me why its safe to skip kvm_apic_accept_pic_intr check before calling ack notifier. > On Tue, Jul 17, 2012 at 02:59:11PM +0300, Gleb Natapov wrote: > > After commit 242ec97c358256 PIT interrupts are no longer delivered after > > PIC reset. It happens because PIT injects interrupt only if previous one > > was acked, but since on PIC reset it is dropped from irr it will never > > be delivered and hence acknowledged. Fix that by calling ack notifier on > > PIC reset. > > > > Signed-off-by: Gleb Natapov > > diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c > > index 81cf4fa..f09e790 100644 > > --- a/arch/x86/kvm/i8259.c > > +++ b/arch/x86/kvm/i8259.c > > @@ -305,6 +305,7 @@ static void pic_ioport_write(void *opaque, u32 addr, u32 val) > > addr &= 1; > > if (addr == 0) { > > if (val & 0x10) { > > + u8 edge_irr = s->irr & ~s->elcr; > > s->init4 = val & 1; > > s->last_irr = 0; > > s->irr &= s->elcr; > > @@ -322,6 +323,9 @@ static void pic_ioport_write(void *opaque, u32 addr, u32 val) > > if (val & 0x08) > > pr_pic_unimpl( > > "level sensitive irq not supported"); > > + for (irq = 0; irq < PIC_NUM_PINS/2; irq++) > > + if (edge_irr & (1 << irq)) > > + pic_clear_isr(s, irq); > > } else if (val & 0x08) { > > if (val & 0x04) > > s->poll = 1; > > -- > > Gleb. > > --