From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Petazzoni Subject: Re: [PATCH 06/10 V2] spi: Add SPI driver for mx233/mx28 Date: Fri, 3 Aug 2012 15:38:15 +0200 Message-ID: <20120803153815.758dc064@skate> References: <1343076052-27312-1-git-send-email-marex@denx.de> <1343076052-27312-7-git-send-email-marex@denx.de> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Cc: Fabio Estevam , Chris Ball , Mark Brown , Attila Kinali , Dong, spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org, Shawn Guo , Aisheng , Linux ARM kernel To: Marek Vasut Return-path: In-Reply-To: <1343076052-27312-7-git-send-email-marex-ynQEQJNshbs@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: spi-devel-general-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org List-Id: linux-spi.vger.kernel.org TWFyZWssCgpMZSBNb24sIDIzIEp1bCAyMDEyIDIyOjQwOjQ4ICswMjAwLApNYXJlayBWYXN1dCA8 bWFyZXhAZGVueC5kZT4gYSDDqWNyaXQgOgoKPiArc3RhdGljIHVpbnQzMl90IG14c19zcGlfY3Nf dG9fcmVnKHVuc2lnbmVkIGNzKQo+ICt7Cj4gKwl1aW50MzJfdCBzZWxlY3QgPSAwOwo+ICsKPiAr CWlmIChjcyAmIDEpCj4gKwkJc2VsZWN0IHw9IEJNX1NTUF9DVFJMMF9XQUlUX0ZPUl9DTUQ7Cj4g KwlpZiAoY3MgJiAyKQo+ICsJCXNlbGVjdCB8PSBCTV9TU1BfQ1RSTDBfV0FJVF9GT1JfSVJROwo+ ICsKPiArCXJldHVybiBzZWxlY3Q7Cj4gK30KCkl0IHNvdW5kcyByZWFsbHkgc3RyYW5nZSB0byBt YW5pcHVsYXRlIFdBSVRfRk9SX0NNRCBhbmQgV0FJVF9GT1JfSVJRCmJpdHMgdG8gYWRqdXN0IHRo ZSBjaGlwIHNlbGVjdCwgYW5kIHdoZW4gcmVhZGluZyB0aGUgZHJpdmVyLCBpdCBzZWVtZWQKc3Vz cGljaW91cyB0byBtZS4gQWZ0ZXIgZ29pbmcgdGhyb3VnaCB0aGUgZGF0YXNoZWV0LCBpbmRlZWQg dGhvc2UgYml0cwphcmUgdGhlIGFwcHJvcHJpYXRlIG9uZSB0byBzZWxlY3QgYmV0d2VlbiB0aGUg U1MwLCBTUzEgYW5kIFNTMiBjaGlwCnNlbGVjdHMsIGJ1dCBJIGZpbmQgdGhlIGNvZGUgbm90IHJl YWxseSBvYnZpb3VzLiBXb3VsZCBpdCBiZSBwb3NzaWJsZQp0byBtYWtlIGl0IG1vcmUgb2J2aW91 cyBlaXRoZXIgYnkgYWRkaW5nIG9yIGNvbW1lbnQgb3IgZG9pbmcgc29tZXRoaW5nCmxpa2U6Cgov KiBTaG91bGQgYmUgcHV0IGluIHNvbWUgaGVhZGVyIGZpbGUgKi8KI2RlZmluZSBCTV9TU1BfQ1RS TDBfU1BJX0NTX0JJVFMgKDIwKQoKK3N0YXRpYyB2b2lkIG14c19zcGlfc2V0X2NzKHN0cnVjdCBt eHNfc3BpICpzcGksIHVuc2lnbmVkIGNzKQoreworCXN0cnVjdCBteHNfc3NwICpzc3AgPSAmc3Bp LT5zc3A7CisKKwl3cml0ZWwoMHgzIDw8IEJNX1NTUF9DVFJMMF9TUElfQ1NfQklUUywKKyAgICAg ICAgICAgICAgc3NwLT5iYXNlICsgSFdfU1NQX0NUUkwwICsgU1RNUF9PRkZTRVRfUkVHX0NMUik7 CisJd3JpdGVsKGNzLAorICAgICAgICAgICAgICBzc3AtPmJhc2UgKyBIV19TU1BfQ1RSTDAgKyBT VE1QX09GRlNFVF9SRUdfU0VUKTsKK30KClJlZ2FyZHMsCgpUaG9tYXMKLS0gClRob21hcyBQZXRh enpvbmksIEZyZWUgRWxlY3Ryb25zCktlcm5lbCwgZHJpdmVycywgcmVhbC10aW1lIGFuZCBlbWJl ZGRlZCBMaW51eApkZXZlbG9wbWVudCwgY29uc3VsdGluZywgdHJhaW5pbmcgYW5kIHN1cHBvcnQu Cmh0dHA6Ly9mcmVlLWVsZWN0cm9ucy5jb20KCi0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLQpMaXZlIFNl Y3VyaXR5IFZpcnR1YWwgQ29uZmVyZW5jZQpFeGNsdXNpdmUgbGl2ZSBldmVudCB3aWxsIGNvdmVy IGFsbCB0aGUgd2F5cyB0b2RheSdzIHNlY3VyaXR5IGFuZCAKdGhyZWF0IGxhbmRzY2FwZSBoYXMg Y2hhbmdlZCBhbmQgaG93IElUIG1hbmFnZXJzIGNhbiByZXNwb25kLiBEaXNjdXNzaW9ucyAKd2ls bCBpbmNsdWRlIGVuZHBvaW50IHNlY3VyaXR5LCBtb2JpbGUgc2VjdXJpdHkgYW5kIHRoZSBsYXRl c3QgaW4gbWFsd2FyZSAKdGhyZWF0cy4gaHR0cDovL3d3dy5hY2NlbGFjb21tLmNvbS9qYXcvc2Zy bmwwNDI0MjAxMi8xMTQvNTAxMjIyNjMvCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fCnNwaS1kZXZlbC1nZW5lcmFsIG1haWxpbmcgbGlzdApzcGktZGV2ZWwt Z2VuZXJhbEBsaXN0cy5zb3VyY2Vmb3JnZS5uZXQKaHR0cHM6Ly9saXN0cy5zb3VyY2Vmb3JnZS5u ZXQvbGlzdHMvbGlzdGluZm8vc3BpLWRldmVsLWdlbmVyYWwK From mboxrd@z Thu Jan 1 00:00:00 1970 From: thomas.petazzoni@free-electrons.com (Thomas Petazzoni) Date: Fri, 3 Aug 2012 15:38:15 +0200 Subject: [PATCH 06/10 V2] spi: Add SPI driver for mx233/mx28 In-Reply-To: <1343076052-27312-7-git-send-email-marex@denx.de> References: <1343076052-27312-1-git-send-email-marex@denx.de> <1343076052-27312-7-git-send-email-marex@denx.de> Message-ID: <20120803153815.758dc064@skate> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Marek, Le Mon, 23 Jul 2012 22:40:48 +0200, Marek Vasut a ?crit : > +static uint32_t mxs_spi_cs_to_reg(unsigned cs) > +{ > + uint32_t select = 0; > + > + if (cs & 1) > + select |= BM_SSP_CTRL0_WAIT_FOR_CMD; > + if (cs & 2) > + select |= BM_SSP_CTRL0_WAIT_FOR_IRQ; > + > + return select; > +} It sounds really strange to manipulate WAIT_FOR_CMD and WAIT_FOR_IRQ bits to adjust the chip select, and when reading the driver, it seemed suspicious to me. After going through the datasheet, indeed those bits are the appropriate one to select between the SS0, SS1 and SS2 chip selects, but I find the code not really obvious. Would it be possible to make it more obvious either by adding or comment or doing something like: /* Should be put in some header file */ #define BM_SSP_CTRL0_SPI_CS_BITS (20) +static void mxs_spi_set_cs(struct mxs_spi *spi, unsigned cs) +{ + struct mxs_ssp *ssp = &spi->ssp; + + writel(0x3 << BM_SSP_CTRL0_SPI_CS_BITS, + ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR); + writel(cs, + ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET); +} Regards, Thomas -- Thomas Petazzoni, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com