From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mike Frysinger Date: Wed, 8 Aug 2012 01:04:51 -0400 Subject: [U-Boot] [PATCH 08/16] Blackfin: add more print info for Bf60x In-Reply-To: <1344326875-348-8-git-send-email-lliubbo@gmail.com> References: <1344326875-348-1-git-send-email-lliubbo@gmail.com> <1344326875-348-8-git-send-email-lliubbo@gmail.com> Message-ID: <201208080104.52478.vapier@gentoo.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Tuesday 07 August 2012 04:07:47 Bob Liu wrote: > --- a/arch/blackfin/lib/clocks.c > +++ b/arch/blackfin/lib/clocks.c > > +u_long get_dclk(void) > +{ > +#ifndef CONFIG_BFIN_GET_DCLK > + return _get_sclk(&cached_dclk); > +#else > + return CONFIG_BFIN_GET_DCLK; > +#endif > +} this looks like my incomplete hack where the implementation of clock lookups weren't finished. that was because at the time, the hardware blocks of the bf60x were not finished which means i couldn't query the MMRs to calculate the values. please implement this ... > --- a/include/configs/bf609-ezkit.h > +++ b/include/configs/bf609-ezkit.h > > #define CONFIG_BFIN_GET_SCLK (CONFIG_PLL_CLK/CONFIG_SYSCLK_DIV) > #define CONFIG_BFIN_GET_SCLK0 (get_sclk()/CONFIG_SCLK0_DIV) > #define CONFIG_BFIN_GET_SCLK1 (get_sclk()/CONFIG_SCLK1_DIV) > +#define CONFIG_BFIN_GET_DCLK (get_cclk()/CONFIG_DCLK_DIV) and then point all these hard coded defines. these existed purely for initial FPGA bring up and were not intended to be shipped as the final code. -mike -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 836 bytes Desc: This is a digitally signed message part. URL: