From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from moutng.kundenserver.de ([212.227.17.8]:64371 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756571Ab2HOUZa (ORCPT ); Wed, 15 Aug 2012 16:25:30 -0400 From: Arnd Bergmann To: Thierry Reding Subject: Re: [PATCH v3 10/10] ARM: tegra: pcie: Add device tree support Date: Wed, 15 Aug 2012 20:25:25 +0000 Cc: Bjorn Helgaas , linux-tegra@vger.kernel.org, linux-pci@vger.kernel.org, Grant Likely , Rob Herring , devicetree-discuss@lists.ozlabs.org, Russell King , linux-arm-kernel@lists.infradead.org, Colin Cross , Olof Johansson , Stephen Warren , Mitch Bradley References: <1343332512-28762-1-git-send-email-thierry.reding@avionic-design.de> <20120815145708.GA11331@avionic-0098.mockup.avionic-design.de> In-Reply-To: <20120815145708.GA11331@avionic-0098.mockup.avionic-design.de> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-15" Message-Id: <201208152025.25252.arnd@arndb.de> Sender: linux-pci-owner@vger.kernel.org List-ID: On Wednesday 15 August 2012, Thierry Reding wrote: > Yes, that was my understanding as well. So currently I haven't seen any > problems with this because I only use one of the two host bridges. But I > suppose I should add code to initialize the bus number aperture properly > either via platform device resources (for the non-DT case) and the > device tree otherwise. I think when we last discussed this, the assumption was that each root port has its own config space range and its own pci domain, so you don't have to worry about bus apertures because each root port can then have all 255 bus numbers. Has that turned out to be incorrect now? Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arnd Bergmann Subject: Re: [PATCH v3 10/10] ARM: tegra: pcie: Add device tree support Date: Wed, 15 Aug 2012 20:25:25 +0000 Message-ID: <201208152025.25252.arnd@arndb.de> References: <1343332512-28762-1-git-send-email-thierry.reding@avionic-design.de> <20120815145708.GA11331@avionic-0098.mockup.avionic-design.de> Mime-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-15" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20120815145708.GA11331-RM9K5IK7kjIQXX3q8xo1gnVAuStQJXxyR5q1nwbD4aMs9pC9oP6+/A@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Thierry Reding Cc: Bjorn Helgaas , linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Grant Likely , Rob Herring , devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org, Russell King , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Colin Cross , Olof Johansson , Stephen Warren , Mitch Bradley List-Id: linux-tegra@vger.kernel.org On Wednesday 15 August 2012, Thierry Reding wrote: > Yes, that was my understanding as well. So currently I haven't seen any > problems with this because I only use one of the two host bridges. But I > suppose I should add code to initialize the bus number aperture properly > either via platform device resources (for the non-DT case) and the > device tree otherwise. I think when we last discussed this, the assumption was that each root port has its own config space range and its own pci domain, so you don't have to worry about bus apertures because each root port can then have all 255 bus numbers. Has that turned out to be incorrect now? Arnd From mboxrd@z Thu Jan 1 00:00:00 1970 From: arnd@arndb.de (Arnd Bergmann) Date: Wed, 15 Aug 2012 20:25:25 +0000 Subject: [PATCH v3 10/10] ARM: tegra: pcie: Add device tree support In-Reply-To: <20120815145708.GA11331@avionic-0098.mockup.avionic-design.de> References: <1343332512-28762-1-git-send-email-thierry.reding@avionic-design.de> <20120815145708.GA11331@avionic-0098.mockup.avionic-design.de> Message-ID: <201208152025.25252.arnd@arndb.de> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wednesday 15 August 2012, Thierry Reding wrote: > Yes, that was my understanding as well. So currently I haven't seen any > problems with this because I only use one of the two host bridges. But I > suppose I should add code to initialize the bus number aperture properly > either via platform device resources (for the non-DT case) and the > device tree otherwise. I think when we last discussed this, the assumption was that each root port has its own config space range and its own pci domain, so you don't have to worry about bus apertures because each root port can then have all 255 bus numbers. Has that turned out to be incorrect now? Arnd