From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Roedel, Joerg" Subject: Re: [PATCH] kvm/fpu: Enable fully eager restore kvm FPU Date: Mon, 20 Aug 2012 11:24:16 +0200 Message-ID: <20120820092416.GB2582@amd.com> References: <1345094044-28962-1-git-send-email-xudong.hao@intel.com> <502CB881.1040807@redhat.com> <403610A45A2B5242BD291EDAE8B37D300FE8AA17@SHSMSX102.ccr.corp.intel.com> <502CD276.7020403@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Cc: "Hao, Xudong" , "kvm@vger.kernel.org" , "Zhang, Xiantao" To: Avi Kivity Return-path: Received: from tx2ehsobe005.messaging.microsoft.com ([65.55.88.15]:31810 "EHLO tx2outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755909Ab2HTJYV (ORCPT ); Mon, 20 Aug 2012 05:24:21 -0400 Content-Disposition: inline In-Reply-To: <502CD276.7020403@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: (Back from vacation) On Thu, Aug 16, 2012 at 01:59:02PM +0300, Avi Kivity wrote: > Ok. Please check that ~KVM_XSTATE_LAZY expands to 64-bits correctly, > maybe we need to cast it to u64 before negating it. > > Note that we limit xcr0 to the bits allowed by the host, so the currect > kernel is safe even on hardware with state that isn't tracked by cr0.ts. > But it's better to be safe here. > > Joerg, IIRC LWP uses one of these bits? Should it be added to the mask? LWP uses bit 62 in xcr0 and is not tracked by cr0.ts either. So this bit should be used to the mask too (in other words LWP is a non-lazy state). Regards, Joerg -- AMD Operating System Research Center Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach General Managers: Alberto Bozzo Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632