From: Matthew Wilcox <matthew@wil.cx>
To: Paolo <paolopiace@gmail.com>
Cc: linux-pci@vger.kernel.org
Subject: Re: BAR0/1 & enumeration
Date: Fri, 31 Aug 2012 13:46:27 -0600 [thread overview]
Message-ID: <20120831194626.GB21160@parisc-linux.org> (raw)
In-Reply-To: <loom.20120831T212633-656@post.gmane.org>
On Fri, Aug 31, 2012 at 07:29:50PM +0000, Paolo wrote:
> As newbie to the pcie world, I'm seeking help for understanding this:
>
> How does the bios during enumeration finds whether BAR0/1 is set for pointing to
> the config-space of its function or to memory space for memory transactions?
BARs point to either memory or I/O space (discriminated by the bottom
bit of the register). They never point to config space (indeed, since
they are found in config space, that wouldn't make sense).
--
Matthew Wilcox Intel Open Source Technology Centre
"Bill, look, we understand that you're interested in selling us this
operating system, but compare it to ours. We can't possibly take such
a retrograde step."
next prev parent reply other threads:[~2012-08-31 19:46 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-31 19:29 BAR0/1 & enumeration Paolo
2012-08-31 19:46 ` Matthew Wilcox [this message]
2012-08-31 19:56 ` Paolo
2012-09-01 3:12 ` Jiang Liu
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