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From: Mark Brown <broonie@opensource.wolfsonmicro.com>
To: Stephen Warren <swarren@wwwdotorg.org>
Cc: linux-tegra@vger.kernel.org, alsa-devel@alsa-project.org,
	Laxman Dewangan <ldewangan@nvidia.com>,
	Stephen Warren <swarren@nvidia.com>, Liam Girdwood <lrg@ti.com>
Subject: Re: [PATCH] ASoC: tegra: fix maxburst settings in dmaengine code
Date: Fri, 7 Sep 2012 09:51:57 +0800	[thread overview]
Message-ID: <20120907015155.GA6827@opensource.wolfsonmicro.com> (raw)
In-Reply-To: <1346975253-2935-1-git-send-email-swarren@wwwdotorg.org>

On Thu, Sep 06, 2012 at 05:47:33PM -0600, Stephen Warren wrote:
> From: Stephen Warren <swarren@nvidia.com>
> 
> The I2S controllers are programmed with an "attention" level of 4 DWORDs.
> This must match the configuration passed to the DMA driver, so that when
> they burst in data, they don't overflow the available FIFO space. Also,
> the burst size is relevant to the destination for playback, and source
> for capture, not vice-versa as originally written.

Applied, thanks.

      parent reply	other threads:[~2012-09-07  1:52 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-09-06 23:47 [PATCH] ASoC: tegra: fix maxburst settings in dmaengine code Stephen Warren
     [not found] ` <1346975253-2935-1-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-09-07  1:00   ` Mark Brown
     [not found]     ` <20120907010050.GE4400-yzvPICuk2AATkU/dhu1WVueM+bqZidxxQQ4Iyu8u01E@public.gmane.org>
2012-09-07  1:36       ` Stephen Warren
     [not found]         ` <50494F8C.3030906-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-09-10 18:03           ` Stephen Warren
     [not found]             ` <504E2B73.2020006-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-09-11  0:05               ` Mark Brown
2012-09-07  1:51 ` Mark Brown [this message]

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