From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH] drm/i915: set the right gen3 flip_done mode also at resume Date: Mon, 10 Sep 2012 21:30:45 +0200 Message-ID: <20120910193045.GD5387@phenom.ffwll.local> References: <1347184456-15042-1-git-send-email-daniel.vetter@ffwll.ch> <275ffc$6hh1td@fmsmga002.fm.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wg0-f41.google.com (mail-wg0-f41.google.com [74.125.82.41]) by gabe.freedesktop.org (Postfix) with ESMTP id F021F9EB1A for ; Mon, 10 Sep 2012 12:30:12 -0700 (PDT) Received: by wgbds1 with SMTP id ds1so1476926wgb.0 for ; Mon, 10 Sep 2012 12:30:12 -0700 (PDT) Content-Disposition: inline In-Reply-To: <275ffc$6hh1td@fmsmga002.fm.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: Daniel Vetter , Intel Graphics Development , "for 3.5 only" List-Id: intel-gfx@lists.freedesktop.org On Sun, Sep 09, 2012 at 12:23:05PM +0100, Chris Wilson wrote: > On Sun, 9 Sep 2012 11:54:16 +0200, Daniel Vetter wrote: > > Currently we've only frobbed this bit at irq_init time, but did > > not restore it at resume time. Move it to the gen3 clock gating > > function to fix this. > > > > Notice while reading through code. > > > > Cc: stable@vger.kernel.org (for 3.5 only) > > Signed-off-by: Daniel Vetter > Reviewed-by: Chris Wilson Picked up for -fixes, thanks for the review. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch