From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH 5/5] drm/i915: disable the cpu edp port
 after the cpu pipe
Date: Thu, 13 Sep 2012 23:12:47 +0200
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To: Paulo Zanoni <przanoni@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>, Intel Graphics Development <intel-gfx@lists.freedesktop.org>
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On Thu, Sep 13, 2012 at 04:43:57PM -0300, Paulo Zanoni wrote:
> 2012/9/13 Daniel Vetter <daniel@ffwll.ch>:
> > On Thu, Sep 13, 2012 at 04:11:20PM -0300, Paulo Zanoni wrote:
> >> Hi
> >>
> >> 2012/9/6 Daniel Vetter <daniel.vetter@ffwll.ch>:
> >> > See bspec, Vol3 Part2, Section 1.1.3 "Display Mode Set Sequence". This
> >> > applies to all platforms where we currently support eDP on, i.e. ilk,
> >> > snb & ivb.
> >> >
> >>
> >> Ok, so I looked at BSpec and the conclusion is: shouldn't we do this
> >> for eDP _and_ DP instead of just eDP? The only things to disable
> >> before the crtc are audio, the panel backlight, and then the panel
> >> power.
> >>
> >> Your patch looks correct, but maybe it could be even more correct by
> >> including DP too? Yes, I can help testing.
> >
> > The dp pll for cpu edp is special, since we set it in the DP_A register.
> > The pll for pch dp ports is just the regular pch pll iirc, and that is
> > handled by the common code. Also, dp pch seems to wfm, whereas cpu edp was
> > definitely broken.
> >
> > In any case, frobbing the pch dp sequence would be a separate patch imo.
> > So can I still have an r-b for this on here?
> 
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

I've slurped in the other 3 patches, thanks for the review.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch