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From: Aurelien Jarno <aurelien@aurel32.net>
To: Richard Henderson <rth@twiddle.net>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 2/8] tcg: Emit ANDI as EXTU for appropriate constants
Date: Sat, 22 Sep 2012 21:52:01 +0200	[thread overview]
Message-ID: <20120922195201.GA32239@ohm.aurel32.net> (raw)
In-Reply-To: <1348273096-1495-3-git-send-email-rth@twiddle.net>

On Fri, Sep 21, 2012 at 05:18:10PM -0700, Richard Henderson wrote:
> Note that andi_i64 failed to perform even the minimal
> optimizations promised by the README.
> 
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  tcg/tcg-op.h | 67 ++++++++++++++++++++++++++++++++++++++++++++++++++----------
>  1 file changed, 56 insertions(+), 11 deletions(-)
> 
> diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
> index 6d28f82..c8633ff 100644
> --- a/tcg/tcg-op.h
> +++ b/tcg/tcg-op.h
> @@ -518,18 +518,34 @@ static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
>      }
>  }
>  
> -static inline void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2)
> +static inline void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2)
>  {
> -    /* some cases can be optimized here */
> -    if (arg2 == 0) {
> +    TCGv_i32 t0;
> +    /* Some cases can be optimized here.  */
> +    switch (arg2) {
> +    case 0:
>          tcg_gen_movi_i32(ret, 0);
> -    } else if (arg2 == 0xffffffff) {
> +        return;
> +    case 0xffffffffu:
>          tcg_gen_mov_i32(ret, arg1);
> -    } else {
> -        TCGv_i32 t0 = tcg_const_i32(arg2);
> -        tcg_gen_and_i32(ret, arg1, t0);
> -        tcg_temp_free_i32(t0);
> -    }
> +        return;
> +    case 0xffu:
> +        /* Don't recurse with tcg_gen_ext8u_i32.  */
> +        if (TCG_TARGET_HAS_ext8u_i32) {
> +            tcg_gen_op2_i32(INDEX_op_ext8u_i32, ret, arg1);
> +            return;
> +        }
> +        break;
> +    case 0xffffu:
> +        if (TCG_TARGET_HAS_ext16u_i32) {
> +            tcg_gen_op2_i32(INDEX_op_ext16u_i32, ret, arg1);
> +            return;
> +        }
> +        break;
> +    }
> +    t0 = tcg_const_i32(arg2);
> +    tcg_gen_and_i32(ret, arg1, t0);
> +    tcg_temp_free_i32(t0);
>  }
>  
>  static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
> @@ -1120,9 +1136,38 @@ static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
>      }
>  }
>  
> -static inline void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
> +static inline void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2)
>  {
> -    TCGv_i64 t0 = tcg_const_i64(arg2);
> +    TCGv_i64 t0;
> +    /* Some cases can be optimized here.  */
> +    switch (arg2) {
> +    case 0:
> +        tcg_gen_movi_i64(ret, 0);
> +        return;
> +    case 0xffffffffffffffffull:
> +        tcg_gen_mov_i64(ret, arg1);
> +        return;
> +    case 0xffull:
> +        /* Don't recurse with tcg_gen_ext8u_i32.  */
> +        if (TCG_TARGET_HAS_ext8u_i64) {
> +            tcg_gen_op2_i64(INDEX_op_ext8u_i64, ret, arg1);
> +            return;
> +        }
> +        break;
> +    case 0xffffu:
> +        if (TCG_TARGET_HAS_ext16u_i64) {
> +            tcg_gen_op2_i64(INDEX_op_ext16u_i64, ret, arg1);
> +            return;
> +        }
> +        break;
> +    case 0xffffffffull:
> +        if (TCG_TARGET_HAS_ext32u_i64) {
> +            tcg_gen_op2_i64(INDEX_op_ext32u_i64, ret, arg1);
> +            return;
> +        }
> +        break;
> +    }
> +    t0 = tcg_const_i64(arg2);
>      tcg_gen_and_i64(ret, arg1, t0);
>      tcg_temp_free_i64(t0);
>  }
> -- 
> 1.7.11.4
> 
> 

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
aurelien@aurel32.net                 http://www.aurel32.net

  reply	other threads:[~2012-09-22 19:52 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-09-22  0:18 [Qemu-devel] [PATCH 0/8] Misc tcg improvements Richard Henderson
2012-09-22  0:18 ` [Qemu-devel] [PATCH 1/8] tcg: Adjust descriptions of *cond opcodes Richard Henderson
2012-09-22 10:16   ` malc
2012-09-22 19:51   ` Aurelien Jarno
2012-09-22  0:18 ` [Qemu-devel] [PATCH 2/8] tcg: Emit ANDI as EXTU for appropriate constants Richard Henderson
2012-09-22 19:52   ` Aurelien Jarno [this message]
2012-09-22  0:18 ` [Qemu-devel] [PATCH 3/8] tcg: Optimize initial inputs for ori_i64 Richard Henderson
2012-09-22 19:52   ` Aurelien Jarno
2012-09-22  0:18 ` [Qemu-devel] [PATCH 4/8] tcg: Emit XORI as NOT for appropriate constants Richard Henderson
2012-09-22 19:52   ` Aurelien Jarno
2012-09-22  0:18 ` [Qemu-devel] [PATCH 5/8] tcg: Implement concat*_i64 with deposit_i64 Richard Henderson
2012-09-22 19:52   ` Aurelien Jarno
2012-09-24 15:38     ` Richard Henderson
2012-09-22  0:18 ` [Qemu-devel] [PATCH 6/8] tcg: Add tcg_debug_assert Richard Henderson
2012-09-22 19:52   ` Aurelien Jarno
2012-09-22  0:18 ` [Qemu-devel] [PATCH 7/8] tcg: Sanity check deposit inputs Richard Henderson
2012-09-22 19:52   ` Aurelien Jarno
2012-09-22  0:18 ` [Qemu-devel] [PATCH 8/8] tcg: Sanity check goto_tb input Richard Henderson
2012-09-22 13:06   ` Max Filippov
2012-09-22 19:52   ` Aurelien Jarno
2012-09-25 22:48 ` [Qemu-devel] [PATCH 0/8] Misc tcg improvements Aurelien Jarno

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