From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 3/9] drm/i915: add a HSW scratch location for flush commands Date: Tue, 25 Sep 2012 10:54:00 +0200 Message-ID: <20120925085400.GG3824@bremse> References: <1348086543-24427-1-git-send-email-jbarnes@virtuousgeek.org> <1348086543-24427-3-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-lb0-f177.google.com (mail-lb0-f177.google.com [209.85.217.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 19F469E730 for ; Tue, 25 Sep 2012 01:54:07 -0700 (PDT) Received: by lbbgf7 with SMTP id gf7so1240193lbb.36 for ; Tue, 25 Sep 2012 01:54:05 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1348086543-24427-3-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Sep 19, 2012 at 01:28:57PM -0700, Jesse Barnes wrote: > Some commands and workarounds require stores to occur to function > correctly, so add some scratch space to the HWS page to accommodate > them. > > Signed-off-by: Jesse Barnes > --- > drivers/gpu/drm/i915/intel_ringbuffer.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h > index 2ea7a31..ef85742 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.h > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h > @@ -181,6 +181,7 @@ intel_read_status_page(struct intel_ring_buffer *ring, > * The area from dword 0x20 to 0x3ff is available for driver usage. > */ > #define I915_GEM_HWS_INDEX 0x20 > +#define I915_GEM_SCRATCH_INDEX 0x28 /* Some commands need a scratch store */ Any specific reason for using an index divisible by 8? Afaik this is an index, and the hw multiplies by 4 on it's own. So looks a bit puzzling when reading (since iirc only 0x21 is used anywhere else, in some dri1 stuff). -Daniel > > void intel_cleanup_ring_buffer(struct intel_ring_buffer *ring); > > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch