From: Aurelien Jarno <aurelien@aurel32.net>
To: Richard Henderson <rth@twiddle.net>
Cc: Alex Barcelo <abarcelo@ac.upc.edu>, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 3/7] tcg-i386: Implement movcond
Date: Wed, 26 Sep 2012 00:48:41 +0200 [thread overview]
Message-ID: <20120925224841.GJ23819@ohm.aurel32.net> (raw)
In-Reply-To: <5060D693.7060601@twiddle.net>
On Mon, Sep 24, 2012 at 02:54:27PM -0700, Richard Henderson wrote:
> On 09/24/2012 02:37 PM, Alex Barcelo wrote:
> > just finished a git-bisect and I found this... and now I do not fully
> > understand why I have the problem.
> >
> > To replicate the error (in a i386 machine, at least):
> > $ make clean && ./configure --enable-debug && make -j && make install
> > [Note: I tried both ppc and i386 targets, so doesn't seem machine-dependent]
> > $ ./path/to/qemu/bin/qemu-i386 doesntmatter
> > Invalid op definition for movcond_i32
> > /mnt/DATA/DARCO/qemu-git/tcg/tcg.c:1170: tcg fatal error
> > Aborted
>
> Ah, right. I only tried with -march=i686.
>
> >> + { INDEX_op_movcond_i32, { "r", "r", "ri", "r", "0" } },
>
> Should be protected by
>
> #if TCG_TARGET_HAS_movcond_i32
>
> If no one beats me to this, I'll submit a patch this evening.
>
>
I have applied the following patch to fix the issue.
commit f813cb838f19ee8637d3c365659e6a6bb0c9c974
Author: Aurelien Jarno <aurelien@aurel32.net>
Date: Wed Sep 26 00:30:12 2012 +0200
tcg/i386: fix build with -march < i686
The movcond_i32 op has to be protected with TCG_TARGET_HAS_movcond_i32
to fix the build with -march < i686.
Thanks to Richard Henderson for the hint.
Reported-by: Alex Barcelo <abarcelo@ac.upc.edu>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
index 122d636..0e218c8 100644
--- a/tcg/i386/tcg-target.c
+++ b/tcg/i386/tcg-target.c
@@ -1893,7 +1893,9 @@ static const TCGTargetOpDef x86_op_defs[] = {
{ INDEX_op_setcond_i32, { "q", "r", "ri" } },
{ INDEX_op_deposit_i32, { "Q", "0", "Q" } },
+#if TCG_TARGET_HAS_movcond_i32
{ INDEX_op_movcond_i32, { "r", "r", "ri", "r", "0" } },
+#endif
#if TCG_TARGET_REG_BITS == 32
{ INDEX_op_mulu2_i32, { "a", "d", "a", "r" } },
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
next prev parent reply other threads:[~2012-09-25 22:48 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-21 17:13 [Qemu-devel] [PATCH v2 0/7] tcg: movcond Richard Henderson
2012-09-21 17:13 ` [Qemu-devel] [PATCH 1/7] tcg: Introduce movcond Richard Henderson
2012-09-21 17:13 ` [Qemu-devel] [PATCH 2/7] target-alpha: Use movcond Richard Henderson
2012-09-21 17:13 ` [Qemu-devel] [PATCH 3/7] tcg-i386: Implement movcond Richard Henderson
2012-09-24 21:37 ` Alex Barcelo
2012-09-24 21:54 ` Richard Henderson
2012-09-25 22:48 ` Aurelien Jarno [this message]
2012-09-21 17:13 ` [Qemu-devel] [PATCH 4/7] tcg: Optimize movcond for constant comparisons Richard Henderson
2012-09-21 17:13 ` [Qemu-devel] [PATCH 5/7] tcg: Optimize two-address commutative operations Richard Henderson
2012-09-21 17:13 ` [Qemu-devel] [PATCH 6/7] tcg: Streamline movcond_i64 using 32-bit arithmetic Richard Henderson
2012-09-21 21:15 ` Aurelien Jarno
2012-09-22 18:11 ` Aurelien Jarno
2012-09-21 17:13 ` [Qemu-devel] [PATCH 7/7] tcg: Streamline movcond_i64 using movcond_i32 Richard Henderson
2012-09-21 21:23 ` Aurelien Jarno
2012-09-21 22:27 ` Richard Henderson
2012-09-22 9:30 ` Aurelien Jarno
2012-09-21 18:14 ` [Qemu-devel] [PATCH v2 0/7] tcg: movcond Aurelien Jarno
2012-09-21 20:10 ` [Qemu-devel] [PATCH v2 0/7] tcg: movcond (ppc32 version) malc
2012-09-21 22:21 ` Richard Henderson
2012-09-21 22:34 ` malc
2012-09-22 14:38 ` Blue Swirl
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