From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lukasz Majewski Date: Thu, 04 Oct 2012 09:18:05 +0200 Subject: [U-Boot] [u-boot] Adding missing CONFIG_SYS_CACHELINE_SIZE to boards definitions In-Reply-To: <20121003230030.GC7623@bill-the-cat> References: <1345795995-24656-5-git-send-email-l.majewski@samsung.com> <20121003230030.GC7623@bill-the-cat> Message-ID: <20121004091805.51060cac@amdc308.digital.local> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Jens and Helmut, > On Thu, Aug 23, 2012 at 10:13:13PM -0000, Lukasz Majewski wrote: > > > The restoration of GPT table (both primary and secondary) is now > > possible. Simple GUID generation is supported. > > > > Signed-off-by: Lukasz Majewski > > Signed-off-by: Kyungmin Park > > While the changes are fine, tt01 and eb_cpux9k2 use CONFIG_PART_EFI > and do not set CONFIG_SYS_CACHELINE_SIZE and so fail to build after > this patch. tt01 is easily fixable (it relies on a non-exported > define elsewhere to 32) but the eb_cpu9k2 please contact the listed > board maintainer to get the define added. > Would it be possible to add the CONFIG_SYS_CACHELINE_SIZE definition to ./include/configs/{tty01|eb_cpux9k2} boards definition? It would help improving cache alignment and GPT development. Thanks in advance -- Best regards, Lukasz Majewski Samsung Poland R&D Center | Linux Platform Group