diff for duplicates of <20121007015406.809888002@gmail.com> diff --git a/a/1.txt b/N1/1.txt index 6db598c..8286769 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,3 +1,128 @@ -An embedded and charset-unspecified text was scrubbed... -Name: arm-bcm476x-add-sched-clock.patch -URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20121007/0b5e6901/attachment.ksh> +From: Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org> + +Sched clock implementation based on the BCM476x's free runner counter. + +Signed-off-by: Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org> +--- + Documentation/devicetree/bindings/timer/brcm,bcm476x-sched-clock.txt | 18 +++ + arch/arm/boot/dts/bcm476x.dtsi | 6 + + drivers/clocksource/bcm476x_timer.c | 52 ++++++++++ + 3 files changed, 76 insertions(+) + +Index: b/Documentation/devicetree/bindings/timer/brcm,bcm476x-sched-clock.txt +=================================================================== +--- /dev/null ++++ b/Documentation/devicetree/bindings/timer/brcm,bcm476x-sched-clock.txt +@@ -0,0 +1,18 @@ ++BCM476x Sched clock ++ ++The BCM476x provides a 63-bit free running counter driven by a separate ++32KHz clock line. ++ ++Required properties: ++ ++- compatible : should be "brcm,bcm476x-sched-clock" ++- reg : Specifies base physical address and size of the registers. ++- clock-frequency : The frequency of the clock that drives the counter, in Hz. ++ ++Example: ++ ++sched-clock { ++ compatible = "brcm,bcm476x-sched-clock"; ++ reg = <0xbc000 0x1000>; ++ clock-frequency = <32000>; ++}; +Index: b/drivers/clocksource/bcm476x_timer.c +=================================================================== +--- a/drivers/clocksource/bcm476x_timer.c ++++ b/drivers/clocksource/bcm476x_timer.c +@@ -54,6 +54,21 @@ struct bcm476x_timer { + struct irqaction act; + }; + ++static void __iomem *system_clock __read_mostly; ++ ++static u32 notrace bcm476x_sched_read(void) ++{ ++ u32 hi, lo; ++ ++ /* access to the counter must happen in the lo-hi order even if ++ * only the lower 32-bit part is of interest ++ */ ++ lo = readl(system_clock); ++ hi = readl(system_clock + 4); ++ ++ return lo; ++} ++ + static inline void __iomem *to_load(struct bcm476x_timer *timer) + { + return timer->base + TIMER_LOAD_OFFSET; +@@ -131,6 +146,42 @@ static irqreturn_t bcm476x_timer_interru + return IRQ_HANDLED; + } + ++static struct of_device_id bcm476x_sched_clock_match[] __initconst = { ++ { .compatible = "brcm,bcm476x-sched-clock" }, ++ {} ++}; ++ ++static void __init bcm476x_sched_clock_init(void) ++{ ++ struct device_node *node; ++ void __iomem *base; ++ u32 freq; ++ ++ node = of_find_matching_node(NULL, bcm476x_sched_clock_match); ++ if (!node) { ++ pr_info("No bcm476x sched clock node"); ++ return; ++ } ++ ++ base = of_iomap(node, 0); ++ if (!base) { ++ pr_err("Can't remap sched clock registers"); ++ return; ++ } ++ ++ if (of_property_read_u32(node, "clock-frequency", &freq)) { ++ pr_err("Can't read sched clock frequency"); ++ return; ++ } ++ if (freq != 32000) { ++ pr_err("Invalid sched clock frequency"); ++ return; ++ } ++ ++ system_clock = base; ++ setup_sched_clock(bcm476x_sched_read, 32, freq); ++} ++ + static struct of_device_id bcm476x_timer_match[] __initconst = { + { .compatible = "brcm,bcm476x-system-timer" }, + {} +@@ -180,6 +231,7 @@ static void __init bcm476x_timer_init(vo + if (setup_irq(irq, &timer->act)) + panic("Can't set up timer IRQ\n"); + ++ bcm476x_sched_clock_init(); + clockevents_config_and_register(&timer->evt, freq, 0xf, 0xffffffff); + } + +Index: b/arch/arm/boot/dts/bcm476x.dtsi +=================================================================== +--- a/arch/arm/boot/dts/bcm476x.dtsi ++++ b/arch/arm/boot/dts/bcm476x.dtsi +@@ -22,6 +22,12 @@ + clock-frequency = <24000000>; + }; + ++ sched-clock { ++ compatible = "brcm,bcm476x-sched-clock"; ++ reg = <0xbc000 0x1000>; ++ clock-frequency = <32000>; ++ }; ++ + vic0: interrupt-controller@80000 { + compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell"; + reg = <0x80000 0x1000>; diff --git a/a/content_digest b/N1/content_digest index f37cf36..de7b508 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,12 +1,140 @@ "ref\020121007015300.828366635@gmail.com\0" - "From\0cavokz@gmail.com (Domenico Andreoli)\0" + "From\0Domenico Andreoli <cavokz-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" "Subject\0[PATCH 3/6] ARM: bcm476x: Add sched clock\0" "Date\0Sun, 07 Oct 2012 03:53:03 +0200\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0" + "Cc\0Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>" + " devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org\0" "\00:1\0" + "fn\0arm-bcm476x-add-sched-clock.patch\0" "b\0" - "An embedded and charset-unspecified text was scrubbed...\n" - "Name: arm-bcm476x-add-sched-clock.patch\n" - URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20121007/0b5e6901/attachment.ksh> + "From: Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>\n" + "\n" + "Sched clock implementation based on the BCM476x's free runner counter.\n" + "\n" + "Signed-off-by: Domenico Andreoli <domenico.andreoli-vYTEC60ixJUAvxtiuMwx3w@public.gmane.org>\n" + "---\n" + " Documentation/devicetree/bindings/timer/brcm,bcm476x-sched-clock.txt | 18 +++\n" + " arch/arm/boot/dts/bcm476x.dtsi | 6 +\n" + " drivers/clocksource/bcm476x_timer.c | 52 ++++++++++\n" + " 3 files changed, 76 insertions(+)\n" + "\n" + "Index: b/Documentation/devicetree/bindings/timer/brcm,bcm476x-sched-clock.txt\n" + "===================================================================\n" + "--- /dev/null\n" + "+++ b/Documentation/devicetree/bindings/timer/brcm,bcm476x-sched-clock.txt\n" + "@@ -0,0 +1,18 @@\n" + "+BCM476x Sched clock\n" + "+\n" + "+The BCM476x provides a 63-bit free running counter driven by a separate\n" + "+32KHz clock line.\n" + "+\n" + "+Required properties:\n" + "+\n" + "+- compatible : should be \"brcm,bcm476x-sched-clock\"\n" + "+- reg : Specifies base physical address and size of the registers.\n" + "+- clock-frequency : The frequency of the clock that drives the counter, in Hz.\n" + "+\n" + "+Example:\n" + "+\n" + "+sched-clock {\n" + "+\tcompatible = \"brcm,bcm476x-sched-clock\";\n" + "+\treg = <0xbc000 0x1000>;\n" + "+\tclock-frequency = <32000>;\n" + "+};\n" + "Index: b/drivers/clocksource/bcm476x_timer.c\n" + "===================================================================\n" + "--- a/drivers/clocksource/bcm476x_timer.c\n" + "+++ b/drivers/clocksource/bcm476x_timer.c\n" + "@@ -54,6 +54,21 @@ struct bcm476x_timer {\n" + " \tstruct irqaction act;\n" + " };\n" + " \n" + "+static void __iomem *system_clock __read_mostly;\n" + "+\n" + "+static u32 notrace bcm476x_sched_read(void)\n" + "+{\n" + "+\tu32 hi, lo;\n" + "+\n" + "+\t/* access to the counter must happen in the lo-hi order even if\n" + "+\t * only the lower 32-bit part is of interest\n" + "+\t */\n" + "+\tlo = readl(system_clock);\n" + "+\thi = readl(system_clock + 4);\n" + "+\n" + "+\treturn lo;\n" + "+}\n" + "+\n" + " static inline void __iomem *to_load(struct bcm476x_timer *timer)\n" + " {\n" + " \treturn timer->base + TIMER_LOAD_OFFSET;\n" + "@@ -131,6 +146,42 @@ static irqreturn_t bcm476x_timer_interru\n" + " \treturn IRQ_HANDLED;\n" + " }\n" + " \n" + "+static struct of_device_id bcm476x_sched_clock_match[] __initconst = {\n" + "+\t{ .compatible = \"brcm,bcm476x-sched-clock\" },\n" + "+\t{}\n" + "+};\n" + "+\n" + "+static void __init bcm476x_sched_clock_init(void)\n" + "+{\n" + "+\tstruct device_node *node;\n" + "+\tvoid __iomem *base;\n" + "+\tu32 freq;\n" + "+\n" + "+\tnode = of_find_matching_node(NULL, bcm476x_sched_clock_match);\n" + "+\tif (!node) {\n" + "+\t\tpr_info(\"No bcm476x sched clock node\");\n" + "+\t\treturn;\n" + "+\t}\n" + "+\n" + "+\tbase = of_iomap(node, 0);\n" + "+\tif (!base) {\n" + "+\t\tpr_err(\"Can't remap sched clock registers\");\n" + "+\t\treturn;\n" + "+\t}\n" + "+\n" + "+\tif (of_property_read_u32(node, \"clock-frequency\", &freq)) {\n" + "+\t\tpr_err(\"Can't read sched clock frequency\");\n" + "+\t\treturn;\n" + "+\t}\n" + "+\tif (freq != 32000) {\n" + "+\t\tpr_err(\"Invalid sched clock frequency\");\n" + "+\t\treturn;\n" + "+\t}\n" + "+\n" + "+\tsystem_clock = base;\n" + "+\tsetup_sched_clock(bcm476x_sched_read, 32, freq);\n" + "+}\n" + "+\n" + " static struct of_device_id bcm476x_timer_match[] __initconst = {\n" + " \t{ .compatible = \"brcm,bcm476x-system-timer\" },\n" + " \t{}\n" + "@@ -180,6 +231,7 @@ static void __init bcm476x_timer_init(vo\n" + " \tif (setup_irq(irq, &timer->act))\n" + " \t\tpanic(\"Can't set up timer IRQ\\n\");\n" + " \n" + "+\tbcm476x_sched_clock_init();\n" + " \tclockevents_config_and_register(&timer->evt, freq, 0xf, 0xffffffff);\n" + " }\n" + " \n" + "Index: b/arch/arm/boot/dts/bcm476x.dtsi\n" + "===================================================================\n" + "--- a/arch/arm/boot/dts/bcm476x.dtsi\n" + "+++ b/arch/arm/boot/dts/bcm476x.dtsi\n" + "@@ -22,6 +22,12 @@\n" + " \t\t\tclock-frequency = <24000000>;\n" + " \t\t};\n" + " \n" + "+\t\tsched-clock {\n" + "+\t\t\tcompatible = \"brcm,bcm476x-sched-clock\";\n" + "+\t\t\treg = <0xbc000 0x1000>;\n" + "+\t\t\tclock-frequency = <32000>;\n" + "+\t\t};\n" + "+\n" + " \t\tvic0: interrupt-controller@80000 {\n" + " \t\t\tcompatible = \"brcm,bcm476x-pl192\", \"arm,pl192-vic\", \"arm,primecell\";\n" + " \t\t\treg = <0x80000 0x1000>;" -46fae2e64ce4dc4d70c67719242b6133593a441068d86ea63ba2883f230b9abb +94e5e5eafc0df3c82b36bc902450ed95cc37025d222a87771fbcb9f17c8260b4
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