From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 13/18] drm/i915: implement workaround for VTOTAL when using TRANSCODER_EDP Date: Tue, 23 Oct 2012 22:44:51 +0200 Message-ID: <20121023204451.GV24005@phenom.ffwll.local> References: <1351024208-3489-1-git-send-email-przanoni@gmail.com> <1351024208-3489-14-git-send-email-przanoni@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-wi0-f169.google.com (mail-wi0-f169.google.com [209.85.212.169]) by gabe.freedesktop.org (Postfix) with ESMTP id 85F8F9F752 for ; Tue, 23 Oct 2012 13:43:49 -0700 (PDT) Received: by mail-wi0-f169.google.com with SMTP id hq4so3433404wib.0 for ; Tue, 23 Oct 2012 13:43:48 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1351024208-3489-14-git-send-email-przanoni@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org On Tue, Oct 23, 2012 at 06:30:03PM -0200, Paulo Zanoni wrote: > From: Paulo Zanoni > > See the documentation for the DDI_FUNC_CTL register, EDP Input Select > bits: when the EDP input selection is B, the VTOTAL_B must be > programmed with the VTOTAL_EDP value, same thing for selection C. > > Signed-off-by: Paulo Zanoni > --- > drivers/gpu/drm/i915/intel_display.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 1b72f36..b7e7814 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -4524,6 +4524,17 @@ static void intel_set_pipe_timings(struct intel_crtc *intel_crtc, > (adjusted_mode->crtc_vsync_start - 1) | > ((adjusted_mode->crtc_vsync_end - 1) << 16)); > > + /* Workaround: when the EDP input selection is B, the VTOTAL_B must be > + * programmed with the VTOTAL_EDP value. Same for VTOTAL_C. This is > + * documented on the DDI_FUNC_CTL register description, EDP Input Select > + * bits. */ > + if (IS_HASWELL(dev) && cpu_transcoder == TRANSCODER_EDP && > + (pipe == PIPE_B || pipe == PIPE_C)) { > + I915_WRITE(VTOTAL(pipe), > + (adjusted_mode->crtc_vdisplay - 1) | > + ((adjusted_mode->crtc_vtotal - 1) << 16)); Tiny bikeshed: I'd prefer I915_WRITE(VTOTAL(pipe), I915_READ(VTOTAL(cpu_transcoder)); since that makes it really clear that we're filling in the same value. We have the same pattern already in the code, e.g. for the pch transcoder stuff. -Daniel > + } > + > /* pipesrc controls the size that is scaled from, which should > * always be the user's requested size. > */ > -- > 1.7.11.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch