From: Mark Brown <broonie@opensource.wolfsonmicro.com>
To: Dong Aisheng <dong.aisheng@linaro.org>
Cc: Fabio Estevam <fabio.estevam@freescale.com>,
DWinner@tc-helicon.com, alsa-devel@alsa-project.org,
shawn.guo@linaro.org, Fabio Estevam <festevam@gmail.com>
Subject: Re: [PATCH] ASoC: mxs-saif: Fix channel swap for 24-bit format
Date: Thu, 1 Nov 2012 12:11:33 +0000 [thread overview]
Message-ID: <20121101121133.GB4413@opensource.wolfsonmicro.com> (raw)
In-Reply-To: <CAP1dx+ydbcYfFrdG0sa2Ro2kfJbCS99nm4J_uFWT4JUo7NkcdQ@mail.gmail.com>
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On Wed, Oct 31, 2012 at 04:50:50PM +0800, Dong Aisheng wrote:
> On 31 October 2012 07:07, Fabio Estevam <festevam@gmail.com> wrote:
> > + * write data to saif data register to trigger
> > + * the transfer.
> > + * For 24-bit format the 32-bit FIFO register stores
> > + * only one channel, so we need to write twice.
> > */
> > __raw_writel(0, saif->base + SAIF_DATA);
> > + __raw_writel(0, saif->base + SAIF_DATA);
> This probably could a workaround for the customer, but i'm not sure
> Mark could accept it
> since the code is a bit confusing. (Mark, what's your suggestion on this?)
I'm not really concerned about the code, the comment is fairly clear
except that it'd be good to mention that this is safe for data sizes
other than 24 bit. It's certainly really much more confusing than the
existing code and if it works better that's obviously good!
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next prev parent reply other threads:[~2012-11-01 12:11 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-30 23:07 [PATCH] ASoC: mxs-saif: Fix channel swap for 24-bit format Fabio Estevam
2012-10-31 8:50 ` Dong Aisheng
2012-11-01 12:11 ` Mark Brown [this message]
2012-11-01 14:20 ` Dong Aisheng
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