From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 1/2] drm/i915: Don't allow ring tail to reach the same cacheline as head Date: Mon, 26 Nov 2012 20:02:00 +0200 Message-ID: <20121126180200.GA21547@intel.com> References: <1353934099-18685-1-git-send-email-ville.syrjala@linux.intel.com> <1353934099-18685-2-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 8761AE5D11 for ; Mon, 26 Nov 2012 10:02:23 -0800 (PST) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Mon, Nov 26, 2012 at 04:28:33PM +0000, Chris Wilson wrote: > On Mon, 26 Nov 2012 14:48:18 +0200, ville.syrjala@linux.intel.com wrote: > > From: Ville Syrj=E4l=E4 > > = > > According to BSpec the ring head and tail pointers must not be > > on the same cacheline when head > tail. The easiest way to enforce > > this is to reduce the reported ring space. > = > I'm going to admit blindness because I don't see that warning in the > gen2-gen7 bspecs. Can you please give chapter and verse, and check to > see if there is a rationale? It's always the last thing in the section titled 'Ring Buffer Use'. I believe it's present in all the pre-snb internal bspecs, and it's also in all the public docs. I can't find it in the internal snb+ bspec but then again those don't seem to include the relevant chapter at all. Of course I can't be sure if it's a valid issue, or just something that got faithfully copypasted from one document to the next. -- = Ville Syrj=E4l=E4 Intel OTC