From: Daniel Vetter <daniel@ffwll.ch>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 00/10] gmbus/dp aux irqfication
Date: Sat, 1 Dec 2012 21:15:14 +0100 [thread overview]
Message-ID: <20121201201514.GG4384@phenom.ffwll.local> (raw)
In-Reply-To: <6c3329$7epj5k@orsmga002.jf.intel.com>
On Sat, Dec 01, 2012 at 06:01:37PM +0000, Chris Wilson wrote:
> On Sat, 01 Dec 2012 16:47:46 +0000, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> > On Sat, 1 Dec 2012 13:53:39 +0100, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> > > Hi all,
> > >
> > > Irq-drive gmbus/dp aux transfer, simply because we can (and at least in the case
> > > of gmbus, it's quite a bit faster than the msleep(1) loop - we now reliably
> > > transfer at full wire speed insteaf of sometimes 2-3x slower).
> > >
> > > Compared to the older version I've floated on irc way back and which Chris has
> > > carried around in his wip branchs (and inflicted upon tons of unsuspecting bug
> > > reporters) there are a few differences:
> > > - handle the hpd vs. setup race - even the current code enables hpd processing
> > > before the fbdev is set up, which is too early.
> > > - fix the gen4 gmbus support, was totally busted.
> > > - tested on hsw (although all the relevant bits are a 100% match with cpt/ivb).
> > > - disable dp aux irq on vlv - too complicated to get at the docs (moved again,
> > > old access revoked) and I don't have the hw.
> > >
> > > While reviewing this patch series I've also noticed two small things in the irq
> > > handling code in general, patches for that at the beginning of the series.
> > >
> > > Comment&review highgly welcome.
> >
> > gm45 appears to be functioning big time, good start. The init sequence
> > looks less convoluted and better understood now, so I am reasonably
> > happy with this series. Will report back later after more testing.
>
> ilk: [ 0.698644] [drm:intel_dp_aux_wait_done] *ERROR* dp aux hw did
> not signal timeout (has irq: 1)! and slow
Should be fixed now.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
next prev parent reply other threads:[~2012-12-01 20:13 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-12-01 12:53 [PATCH 00/10] gmbus/dp aux irqfication Daniel Vetter
2012-12-01 12:53 ` [PATCH 01/10] drm/i915: haswell has the same irq handlers as ivb Daniel Vetter
2012-12-01 12:53 ` [PATCH 02/10] drm/i915: don't handle PIPE_LEGACY_BLC_EVENT_STATUS on vlv Daniel Vetter
2012-12-03 15:49 ` Jesse Barnes
2012-12-04 14:37 ` Imre Deak
2012-12-04 15:13 ` Daniel Vetter
2012-12-01 12:53 ` [PATCH 03/10] drm/i915: reorder setup sequence to have irqs for output setup Daniel Vetter
2012-12-01 20:03 ` [PATCH 1/2] drm/i915: setup the hangcheck timer early Daniel Vetter
2012-12-01 20:03 ` [PATCH 2/2] drm/i915: reorder setup sequence to have irqs for output setup Daniel Vetter
2012-12-01 12:53 ` [PATCH 04/10] drm/i915: extract gmbus_wait_hw_status Daniel Vetter
2012-12-01 12:53 ` [PATCH 05/10] drm/i915: wire up gmbus irq handler Daniel Vetter
2012-12-01 12:53 ` [PATCH 06/10] drm/i915: use the gmbus irq for waits Daniel Vetter
2012-12-01 12:53 ` [PATCH 07/10] drm/i915: use gmbus irq to wait for gmbus idle Daniel Vetter
2012-12-01 12:53 ` [PATCH 08/10] drm/i915: wire up do aux channel done interrupt Daniel Vetter
2012-12-01 12:53 ` [PATCH 09/10] drm/i915: irq-drive the dp aux communication Daniel Vetter
2012-12-01 12:53 ` [PATCH 10/10] drm/i915: use _NOTRACE for gmbus/dp aux wait loops Daniel Vetter
2012-12-01 16:35 ` Chris Wilson
2012-12-01 20:03 ` [PATCH] " Daniel Vetter
2012-12-01 16:47 ` [PATCH 00/10] gmbus/dp aux irqfication Chris Wilson
2012-12-01 18:01 ` Chris Wilson
2012-12-01 20:15 ` Daniel Vetter [this message]
2012-12-04 9:20 ` Chris Wilson
2012-12-04 16:04 ` Imre Deak
2012-12-05 10:59 ` Daniel Vetter
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