From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Widawsky Subject: Re: [PATCH] drm/i915: fixup l3 parity sysfs access check Date: Wed, 5 Dec 2012 08:41:25 -0800 Message-ID: <20121205084125.00005815@unknown> References: <1354697534-32242-1-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from shiva.chad-versace.us (209-20-75-48.static.cloud-ips.com [209.20.75.48]) by gabe.freedesktop.org (Postfix) with ESMTP id 5E76CE61FE for ; Wed, 5 Dec 2012 08:42:21 -0800 (PST) In-Reply-To: <1354697534-32242-1-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: Intel Graphics Development , Ben Widawsky List-Id: intel-gfx@lists.freedesktop.org On Wed, 5 Dec 2012 09:52:14 +0100 Daniel Vetter wrote: > When l3 parity support for Haswell was enabled in > > commit f27b92651d72e863c308ea5dca5615fc98e38ca6 > Author: Ben Widawsky > Date: Tue Jul 24 20:47:32 2012 -0700 > > drm/i915: Expand DPF support to Haswell > > no one noticed that the patch which introduced this macro > > commit e1ef7cc299839e68dae3f1843f62e52acda04538 > Author: Ben Widawsky > Date: Tue Jul 24 20:47:31 2012 -0700 > > drm/i915: Macro to determine DPF support > > missed one spot. Fix this. > > Cc: Ben Widawsky > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57441 > Signed-off-by: Daniel Vetter Reviewed-by: Ben Widawsky > --- > drivers/gpu/drm/i915/i915_sysfs.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_sysfs.c > b/drivers/gpu/drm/i915/i915_sysfs.c index 3bf51d5..9462081 100644 > --- a/drivers/gpu/drm/i915/i915_sysfs.c > +++ b/drivers/gpu/drm/i915/i915_sysfs.c > @@ -97,7 +97,7 @@ static struct attribute_group rc6_attr_group = { > > static int l3_access_valid(struct drm_device *dev, loff_t offset) > { > - if (!IS_IVYBRIDGE(dev)) > + if (!HAS_L3_GPU_CACHE(dev)) > return -EPERM; > > if (offset % 4 != 0)