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diff for duplicates of <20121205222232.67B2B3E0E22@localhost>

diff --git a/a/1.txt b/N1/1.txt
index 9339773..d2109a8 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -114,7 +114,7 @@ Otherwise the binding looks fine to me.
 > +
 > +Example for an AM33xx board:
 > +
-> +	gpmc: gpmc@50000000 {
+> +	gpmc: gpmc at 50000000 {
 > +		compatible = "ti,gpmc";
 > +		ti,hwmods = "gpmc";
 > +		reg = <0x50000000 0x1000000>;
@@ -125,7 +125,7 @@ Otherwise the binding looks fine to me.
 > +		#size-cells = <1>;
 > +		ranges = <0 0 0x08000000 0x2000>;	/* CS0: NAND */
 > +
-> +		nand@0,0 {
+> +		nand at 0,0 {
 > +			reg = <0 0 0>; /* CS0, offset 0 */
 > +			nand-bus-width = <16>;
 > +			ti,nand-ecc-opt = "bch8";
diff --git a/a/content_digest b/N1/content_digest
index cad9c8c..c9c9194 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,20 +1,9 @@
  "ref\01354734571-10774-1-git-send-email-zonque@gmail.com\0"
  "ref\01354734571-10774-6-git-send-email-zonque@gmail.com\0"
- "From\0Grant Likely <grant.likely@secretlab.ca>\0"
- "Subject\0Re: [PATCH v7 5/5] ARM: OMAP: gpmc: add DT bindings for GPMC timings and NAND\0"
+ "From\0grant.likely@secretlab.ca (Grant Likely)\0"
+ "Subject\0[PATCH v7 5/5] ARM: OMAP: gpmc: add DT bindings for GPMC timings and NAND\0"
  "Date\0Wed, 05 Dec 2012 22:22:32 +0000\0"
- "To\0linux-arm-kernel@lists.infradead.org"
- " rob.herring@calxeda.com\0"
- "Cc\0linux-omap@vger.kernel.org"
-  jon-hunter@ti.com
-  avinashphilip@ti.com
-  x0148406@ti.com
-  tony@atomide.com
-  paul@pwsan.com
-  nsekhar@ti.com
-  jacmet@sunsite.dk
-  devicetree-discuss@lists.ozlabs.org
- " Daniel Mack <zonque@gmail.com>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "On Wed,  5 Dec 2012 20:09:31 +0100, Daniel Mack <zonque@gmail.com> wrote:\n"
@@ -133,7 +122,7 @@
  "> +\n"
  "> +Example for an AM33xx board:\n"
  "> +\n"
- "> +\tgpmc: gpmc@50000000 {\n"
+ "> +\tgpmc: gpmc at 50000000 {\n"
  "> +\t\tcompatible = \"ti,gpmc\";\n"
  "> +\t\tti,hwmods = \"gpmc\";\n"
  "> +\t\treg = <0x50000000 0x1000000>;\n"
@@ -144,7 +133,7 @@
  "> +\t\t#size-cells = <1>;\n"
  "> +\t\tranges = <0 0 0x08000000 0x2000>;\t/* CS0: NAND */\n"
  "> +\n"
- "> +\t\tnand@0,0 {\n"
+ "> +\t\tnand at 0,0 {\n"
  "> +\t\t\treg = <0 0 0>; /* CS0, offset 0 */\n"
  "> +\t\t\tnand-bus-width = <16>;\n"
  "> +\t\t\tti,nand-ecc-opt = \"bch8\";\n"
@@ -389,4 +378,4 @@
  "Grant Likely, B.Sc, P.Eng.\n"
  Secret Lab Technologies, Ltd.
 
-ce5e85f707318c7d0a979f79e709100bea415df9dddefdb9d88a033c8a95dd76
+31f7c187d81a5c22c347a8e77d0d9b5ffce45e05a36f8eac7e88bca1a2a83fb6

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