From mboxrd@z Thu Jan 1 00:00:00 1970 From: lee.jones@linaro.org (Lee Jones) Date: Fri, 21 Dec 2012 09:13:06 +0000 Subject: [PATCH 4/4] net/smsc911x: Provide common clock functionality In-Reply-To: <20121220205113.GD14363@n2100.arm.linux.org.uk> References: <1355937587-31730-1-git-send-email-lee.jones@linaro.org> <1355937587-31730-4-git-send-email-lee.jones@linaro.org> <20121220192441.GC14363@n2100.arm.linux.org.uk> <20121220203514.GN2691@gmail.com> <20121220205113.GD14363@n2100.arm.linux.org.uk> Message-ID: <20121221091306.GO2691@gmail.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Thu, 20 Dec 2012, Russell King - ARM Linux wrote: > On Thu, Dec 20, 2012 at 08:35:14PM +0000, Lee Jones wrote: > > On Thu, 20 Dec 2012, Russell King - ARM Linux wrote: > > > > > On Thu, Dec 20, 2012 at 08:12:08PM +0100, Linus Walleij wrote: > > > > On Wed, Dec 19, 2012 at 6:19 PM, Lee Jones wrote: > > > > > > > > > Some platforms provide clocks which require enabling before the > > > > > SMSC911x chip will power on. This patch uses the new common clk > > > > > framework to do just that. If no clock is provided, it will just > > > > > be ignored and the driver will continue to assume that no clock > > > > > is required for the chip to run successfully. > > > > > > > > > > Cc: Steve Glendinning > > > > > Cc: netdev at vger.kernel.org > > > > > Signed-off-by: Lee Jones > > > > > > > > Seems to me like it'll do the trick. > > > > Acked-by: Linus Walleij > > > > > > This looks fairly dangerous. What about those platforms which use this > > > driver, but don't provide a clock for it? > > > > > > It looks like this will result in those platforms losing their ethernet > > > support. There's at least a bunch of the ARM evaluation boards which > > > make use of this driver... > > > > Right, but nothing should regress. If no clock is provided the driver > > moves on during the request and will refuse to prepare, enable and > > disable there after. > > > > Unless I've made a mistake somewhere? If so, I'd be happy to fixup. > > No, but... don't use NULL for that. Use IS_ERR(pdata->clk) instead. I'm a bit confused. I do use IS_ERR, then if there was a problem pdata->clk is set to NULL, then we test for NULL thereafter: > /* Request clock */ > pdata->clk = clk_get(&pdev->dev, NULL); > if (IS_ERR(pdata->clk)) { > netdev_warn(ndev, "couldn't get clock %d\n", PTR_ERR(pdata->clk)); > pdata->clk = NULL; > } Are you saying remove "pdata->clk = NULL;" and test for IS_ERR every time? -- Lee Jones Linaro ST-Ericsson Landing Team Lead Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751788Ab2LUJNT (ORCPT ); Fri, 21 Dec 2012 04:13:19 -0500 Received: from mail-bk0-f46.google.com ([209.85.214.46]:38335 "EHLO mail-bk0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751504Ab2LUJNN (ORCPT ); Fri, 21 Dec 2012 04:13:13 -0500 Date: Fri, 21 Dec 2012 09:13:06 +0000 From: Lee Jones To: Russell King - ARM Linux Cc: Linus Walleij , Steve Glendinning , Robert Marklund , linus.walleij@stericsson.com, arnd@arndb.de, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 4/4] net/smsc911x: Provide common clock functionality Message-ID: <20121221091306.GO2691@gmail.com> References: <1355937587-31730-1-git-send-email-lee.jones@linaro.org> <1355937587-31730-4-git-send-email-lee.jones@linaro.org> <20121220192441.GC14363@n2100.arm.linux.org.uk> <20121220203514.GN2691@gmail.com> <20121220205113.GD14363@n2100.arm.linux.org.uk> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20121220205113.GD14363@n2100.arm.linux.org.uk> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 20 Dec 2012, Russell King - ARM Linux wrote: > On Thu, Dec 20, 2012 at 08:35:14PM +0000, Lee Jones wrote: > > On Thu, 20 Dec 2012, Russell King - ARM Linux wrote: > > > > > On Thu, Dec 20, 2012 at 08:12:08PM +0100, Linus Walleij wrote: > > > > On Wed, Dec 19, 2012 at 6:19 PM, Lee Jones wrote: > > > > > > > > > Some platforms provide clocks which require enabling before the > > > > > SMSC911x chip will power on. This patch uses the new common clk > > > > > framework to do just that. If no clock is provided, it will just > > > > > be ignored and the driver will continue to assume that no clock > > > > > is required for the chip to run successfully. > > > > > > > > > > Cc: Steve Glendinning > > > > > Cc: netdev@vger.kernel.org > > > > > Signed-off-by: Lee Jones > > > > > > > > Seems to me like it'll do the trick. > > > > Acked-by: Linus Walleij > > > > > > This looks fairly dangerous. What about those platforms which use this > > > driver, but don't provide a clock for it? > > > > > > It looks like this will result in those platforms losing their ethernet > > > support. There's at least a bunch of the ARM evaluation boards which > > > make use of this driver... > > > > Right, but nothing should regress. If no clock is provided the driver > > moves on during the request and will refuse to prepare, enable and > > disable there after. > > > > Unless I've made a mistake somewhere? If so, I'd be happy to fixup. > > No, but... don't use NULL for that. Use IS_ERR(pdata->clk) instead. I'm a bit confused. I do use IS_ERR, then if there was a problem pdata->clk is set to NULL, then we test for NULL thereafter: > /* Request clock */ > pdata->clk = clk_get(&pdev->dev, NULL); > if (IS_ERR(pdata->clk)) { > netdev_warn(ndev, "couldn't get clock %d\n", PTR_ERR(pdata->clk)); > pdata->clk = NULL; > } Are you saying remove "pdata->clk = NULL;" and test for IS_ERR every time? -- Lee Jones Linaro ST-Ericsson Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lee Jones Subject: Re: [PATCH 4/4] net/smsc911x: Provide common clock functionality Date: Fri, 21 Dec 2012 09:13:06 +0000 Message-ID: <20121221091306.GO2691@gmail.com> References: <1355937587-31730-1-git-send-email-lee.jones@linaro.org> <1355937587-31730-4-git-send-email-lee.jones@linaro.org> <20121220192441.GC14363@n2100.arm.linux.org.uk> <20121220203514.GN2691@gmail.com> <20121220205113.GD14363@n2100.arm.linux.org.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Cc: Steve Glendinning , Robert Marklund , linus.walleij@stericsson.com, arnd@arndb.de, netdev@vger.kernel.org, Linus Walleij , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org To: Russell King - ARM Linux Return-path: Content-Disposition: inline In-Reply-To: <20121220205113.GD14363@n2100.arm.linux.org.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org List-Id: netdev.vger.kernel.org T24gVGh1LCAyMCBEZWMgMjAxMiwgUnVzc2VsbCBLaW5nIC0gQVJNIExpbnV4IHdyb3RlOgoKPiBP biBUaHUsIERlYyAyMCwgMjAxMiBhdCAwODozNToxNFBNICswMDAwLCBMZWUgSm9uZXMgd3JvdGU6 Cj4gPiBPbiBUaHUsIDIwIERlYyAyMDEyLCBSdXNzZWxsIEtpbmcgLSBBUk0gTGludXggd3JvdGU6 Cj4gPiAKPiA+ID4gT24gVGh1LCBEZWMgMjAsIDIwMTIgYXQgMDg6MTI6MDhQTSArMDEwMCwgTGlu dXMgV2FsbGVpaiB3cm90ZToKPiA+ID4gPiBPbiBXZWQsIERlYyAxOSwgMjAxMiBhdCA2OjE5IFBN LCBMZWUgSm9uZXMgPGxlZS5qb25lc0BsaW5hcm8ub3JnPiB3cm90ZToKPiA+ID4gPiAKPiA+ID4g PiA+IFNvbWUgcGxhdGZvcm1zIHByb3ZpZGUgY2xvY2tzIHdoaWNoIHJlcXVpcmUgZW5hYmxpbmcg YmVmb3JlIHRoZQo+ID4gPiA+ID4gU01TQzkxMXggY2hpcCB3aWxsIHBvd2VyIG9uLiBUaGlzIHBh dGNoIHVzZXMgdGhlIG5ldyBjb21tb24gY2xrCj4gPiA+ID4gPiBmcmFtZXdvcmsgdG8gZG8ganVz dCB0aGF0LiBJZiBubyBjbG9jayBpcyBwcm92aWRlZCwgaXQgd2lsbCBqdXN0Cj4gPiA+ID4gPiBi ZSBpZ25vcmVkIGFuZCB0aGUgZHJpdmVyIHdpbGwgY29udGludWUgdG8gYXNzdW1lIHRoYXQgbm8g Y2xvY2sKPiA+ID4gPiA+IGlzIHJlcXVpcmVkIGZvciB0aGUgY2hpcCB0byBydW4gc3VjY2Vzc2Z1 bGx5Lgo+ID4gPiA+ID4KPiA+ID4gPiA+IENjOiBTdGV2ZSBHbGVuZGlubmluZyA8c3RldmUuZ2xl bmRpbm5pbmdAc2hhd2VsbC5uZXQ+Cj4gPiA+ID4gPiBDYzogbmV0ZGV2QHZnZXIua2VybmVsLm9y Zwo+ID4gPiA+ID4gU2lnbmVkLW9mZi1ieTogTGVlIEpvbmVzIDxsZWUuam9uZXNAbGluYXJvLm9y Zz4KPiA+ID4gPiAKPiA+ID4gPiBTZWVtcyB0byBtZSBsaWtlIGl0J2xsIGRvIHRoZSB0cmljay4K PiA+ID4gPiBBY2tlZC1ieTogTGludXMgV2FsbGVpaiA8bGludXMud2FsbGVpakBsaW5hcm8ub3Jn Pgo+ID4gPiAKPiA+ID4gVGhpcyBsb29rcyBmYWlybHkgZGFuZ2Vyb3VzLiAgV2hhdCBhYm91dCB0 aG9zZSBwbGF0Zm9ybXMgd2hpY2ggdXNlIHRoaXMKPiA+ID4gZHJpdmVyLCBidXQgZG9uJ3QgcHJv dmlkZSBhIGNsb2NrIGZvciBpdD8KPiA+ID4gCj4gPiA+IEl0IGxvb2tzIGxpa2UgdGhpcyB3aWxs IHJlc3VsdCBpbiB0aG9zZSBwbGF0Zm9ybXMgbG9zaW5nIHRoZWlyIGV0aGVybmV0Cj4gPiA+IHN1 cHBvcnQuICBUaGVyZSdzIGF0IGxlYXN0IGEgYnVuY2ggb2YgdGhlIEFSTSBldmFsdWF0aW9uIGJv YXJkcyB3aGljaAo+ID4gPiBtYWtlIHVzZSBvZiB0aGlzIGRyaXZlci4uLgo+ID4gCj4gPiBSaWdo dCwgYnV0IG5vdGhpbmcgc2hvdWxkIHJlZ3Jlc3MuIElmIG5vIGNsb2NrIGlzIHByb3ZpZGVkIHRo ZSBkcml2ZXIKPiA+IG1vdmVzIG9uIGR1cmluZyB0aGUgcmVxdWVzdCBhbmQgd2lsbCByZWZ1c2Ug dG8gcHJlcGFyZSwgZW5hYmxlIGFuZAo+ID4gZGlzYWJsZSB0aGVyZSBhZnRlci4gCj4gPiAKPiA+ IFVubGVzcyBJJ3ZlIG1hZGUgYSBtaXN0YWtlIHNvbWV3aGVyZT8gSWYgc28sIEknZCBiZSBoYXBw eSB0byBmaXh1cC4KPiAKPiBObywgYnV0Li4uIGRvbid0IHVzZSBOVUxMIGZvciB0aGF0LiAgVXNl IElTX0VSUihwZGF0YS0+Y2xrKSBpbnN0ZWFkLgoKSSdtIGEgYml0IGNvbmZ1c2VkLiBJIGRvIHVz ZSBJU19FUlIsIHRoZW4gaWYgdGhlcmUgd2FzIGEgcHJvYmxlbQpwZGF0YS0+Y2xrIGlzIHNldCB0 byBOVUxMLCB0aGVuIHdlIHRlc3QgZm9yIE5VTEwgdGhlcmVhZnRlcjoKCj4gLyogUmVxdWVzdCBj bG9jayAqLwo+IHBkYXRhLT5jbGsgPSBjbGtfZ2V0KCZwZGV2LT5kZXYsIE5VTEwpOwo+IGlmIChJ U19FUlIocGRhdGEtPmNsaykpIHsKPiAgICAgICAgIG5ldGRldl93YXJuKG5kZXYsICJjb3VsZG4n dCBnZXQgY2xvY2sgJWRcbiIsIFBUUl9FUlIocGRhdGEtPmNsaykpOwo+ICAgICAgICAgcGRhdGEt PmNsayA9IE5VTEw7Cj4gfQoKQXJlIHlvdSBzYXlpbmcgcmVtb3ZlICJwZGF0YS0+Y2xrID0gTlVM TDsiIGFuZCB0ZXN0IGZvciBJU19FUlIKZXZlcnkgdGltZT8KCi0tIApMZWUgSm9uZXMKTGluYXJv IFNULUVyaWNzc29uIExhbmRpbmcgVGVhbSBMZWFkCkxpbmFyby5vcmcg4pSCIE9wZW4gc291cmNl IHNvZnR3YXJlIGZvciBBUk0gU29DcwpGb2xsb3cgTGluYXJvOiBGYWNlYm9vayB8IFR3aXR0ZXIg fCBCbG9nCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwps aW51eC1hcm0ta2VybmVsIG1haWxpbmcgbGlzdApsaW51eC1hcm0ta2VybmVsQGxpc3RzLmluZnJh ZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9saW51 eC1hcm0ta2VybmVsCg==