From: Ingo Molnar <mingo@kernel.org>
To: Andi Kleen <andi@firstfloor.org>
Cc: mingo@elte.hu, linux-kernel@vger.kernel.org,
a.p.zijlstra@chello.nl, akpm@linux-foundation.org,
acme@redhat.com, eranian@google.com, jolsa@redhat.com,
namhyung@kernel.org
Subject: Re: perf PMU support for Haswell v7
Date: Thu, 24 Jan 2013 12:39:17 +0100 [thread overview]
Message-ID: <20130124113917.GD32259@gmail.com> (raw)
In-Reply-To: <1358455012-12287-1-git-send-email-andi@firstfloor.org>
* Andi Kleen <andi@firstfloor.org> wrote:
> [Updated version for the latest master tree and fixes. See
> end for details. All feedback addressed. Ready for merging.]
Could we try a minimal, obvious hardware-enablement series
first, with all the optional features left out in the first
step? Your patches look mostly shaped in that way already, so
this would be mostly a resend of just the basic bits.
( I also finally got access to real Haswell hardware so I'll be
able to try these out and verify them. The patches are way too
large to be applied blindly. )
Thanks,
Ingo
prev parent reply other threads:[~2013-01-24 11:39 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-17 20:36 perf PMU support for Haswell v7 Andi Kleen
2013-01-17 20:36 ` [PATCH 01/29] perf, x86: Add PEBSv2 record support Andi Kleen
2013-01-17 20:36 ` [PATCH 02/29] perf, x86: Basic Haswell PMU support v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 03/29] perf, x86: Basic Haswell PEBS support v3 Andi Kleen
2013-01-17 20:36 ` [PATCH 04/29] perf, x86: Support the TSX intx/intx_cp qualifiers v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 05/29] perf, kvm: Support the intx/intx_cp modifiers in KVM arch perfmon emulation v4 Andi Kleen
2013-01-20 14:04 ` Gleb Natapov
2013-01-17 20:36 ` [PATCH 06/29] perf, x86: Support PERF_SAMPLE_ADDR on Haswell Andi Kleen
2013-01-17 20:36 ` [PATCH 07/29] perf, x86: Support Haswell v4 LBR format Andi Kleen
2013-01-17 20:36 ` [PATCH 08/29] perf, x86: Disable LBR recording for unknown LBR_FMT Andi Kleen
2013-01-17 20:36 ` [PATCH 09/29] perf, x86: Support LBR filtering by INTX/NOTX/ABORT v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 10/29] perf, tools: Add abort_tx,no_tx,in_tx branch filter options to perf record -j v3 Andi Kleen
2013-01-17 20:36 ` [PATCH 11/29] perf, tools: Support sorting by intx, abort branch flags v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 12/29] perf, x86: Support full width counting Andi Kleen
2013-01-17 20:36 ` [PATCH 13/29] perf, x86: Avoid checkpointed counters causing excessive TSX aborts v3 Andi Kleen
2013-01-17 20:36 ` [PATCH 14/29] perf, core: Add a concept of a weightened sample v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 15/29] perf, x86: Support weight samples for PEBS Andi Kleen
2013-01-17 20:36 ` [PATCH 16/29] perf, tools: Add support for weight v7 Andi Kleen
2013-01-23 11:38 ` Stephane Eranian
2013-01-23 11:54 ` Stephane Eranian
2013-01-23 16:56 ` Andi Kleen
2013-01-23 17:00 ` Stephane Eranian
2013-01-23 17:13 ` Andi Kleen
2013-01-23 17:25 ` Stephane Eranian
2013-01-23 18:02 ` Andi Kleen
2013-01-23 18:18 ` Stephane Eranian
2013-01-23 18:50 ` Andi Kleen
2013-01-23 18:57 ` Stephane Eranian
2013-01-17 20:36 ` [PATCH 17/29] perf, core: Add generic transaction flags v3 Andi Kleen
2013-01-17 20:36 ` [PATCH 18/29] perf, x86: Add Haswell specific transaction flag reporting Andi Kleen
2013-01-17 20:36 ` [PATCH 19/29] perf, tools: Add support for record transaction flags v3 Andi Kleen
2013-01-17 20:36 ` [PATCH 20/29] perf, tools: Add browser support for transaction flags v5 Andi Kleen
2013-01-17 20:36 ` [PATCH 21/29] perf, x86: Move NMI clearing to end of PMI handler after the counter registers are reset Andi Kleen
2013-01-17 20:36 ` [PATCH 22/29] tools, perf: Add a precise event qualifier v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 23/29] perf, x86: improve sysfs event mapping with event string Andi Kleen
2013-01-17 20:36 ` [PATCH 24/29] perf, x86: Support CPU specific sysfs events Andi Kleen
2013-01-17 20:36 ` [PATCH 25/29] perf, x86: Add Haswell TSX event aliases v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 26/29] perf, tools: Add perf stat --transaction v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 27/29] perf, x86: Add a Haswell precise instructions event v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 28/29] perf, tools: Default to cpu// for events v5 Andi Kleen
2013-01-17 20:36 ` [PATCH 29/29] perf, tools: List kernel supplied event aliases in perf list v2 Andi Kleen
2013-01-24 11:39 ` Ingo Molnar [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20130124113917.GD32259@gmail.com \
--to=mingo@kernel.org \
--cc=a.p.zijlstra@chello.nl \
--cc=acme@redhat.com \
--cc=akpm@linux-foundation.org \
--cc=andi@firstfloor.org \
--cc=eranian@google.com \
--cc=jolsa@redhat.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@elte.hu \
--cc=namhyung@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.