From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 3/4] drm/i915: dont save/restore VGA state for kms Date: Fri, 25 Jan 2013 21:09:58 +0200 Message-ID: <20130125190958.GJ9135@intel.com> References: <1359132802-1247-1-git-send-email-daniel.vetter@ffwll.ch> <1359132802-1247-4-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id B7E9BE6E2A for ; Fri, 25 Jan 2013 11:10:01 -0800 (PST) Content-Disposition: inline In-Reply-To: <1359132802-1247-4-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Fri, Jan 25, 2013 at 05:53:21PM +0100, Daniel Vetter wrote: > The only thing we really care about that it is off. To do so, reuse > the recently created i915_redisable_vga function, which is already > used to put obnoxious firmware into check on lid reopening. > = > Signed-off-by: Daniel Vetter > --- > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/i915_suspend.c | 48 +++++++++++++++++++-----------= ------ > drivers/gpu/drm/i915/intel_display.c | 2 +- > 3 files changed, 28 insertions(+), 23 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_= drv.h > index 953060c..0ce7c8a 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1788,6 +1788,7 @@ extern void intel_modeset_cleanup(struct drm_device= *dev); > extern int intel_modeset_vga_set_state(struct drm_device *dev, bool stat= e); > extern void intel_modeset_setup_hw_state(struct drm_device *dev, > bool force_restore); > +extern void i915_redisable_vga(struct drm_device *dev); > extern bool intel_fbc_enabled(struct drm_device *dev); > extern void intel_disable_fbc(struct drm_device *dev); > extern bool ironlake_set_drps(struct drm_device *dev, u8 val); > diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i= 915_suspend.c > index 056bd12..edcbfaf 100644 > --- a/drivers/gpu/drm/i915/i915_suspend.c > +++ b/drivers/gpu/drm/i915/i915_suspend.c > @@ -69,6 +69,15 @@ static void i915_save_vga(struct drm_device *dev) > int i; > u16 cr_index, cr_data, st01; > = > + /* VGA state */ > + dev_priv->regfile.saveVGA0 =3D I915_READ(VGA0); > + dev_priv->regfile.saveVGA1 =3D I915_READ(VGA1); > + dev_priv->regfile.saveVGA_PD =3D I915_READ(VGA_PD); BTW these three don't seem to exist on PCH platforms at all. I guess gen <=3D 4 would be the most appropriate check since VLV doesn't have them either, but in this code it doesn't matter much if the check is for non-PCH instead. I'll include a patch for this in my = IS_DISPLAYREG() series. -- = Ville Syrj=E4l=E4 Intel OTC