From: Andi Kleen <andi@firstfloor.org>
To: Stephane Eranian <eranian@google.com>
Cc: Andi Kleen <andi@firstfloor.org>, Ingo Molnar <mingo@kernel.org>,
LKML <linux-kernel@vger.kernel.org>,
Peter Zijlstra <a.p.zijlstra@chello.nl>,
Andrew Morton <akpm@linux-foundation.org>,
Arnaldo Carvalho de Melo <acme@redhat.com>,
Jiri Olsa <jolsa@redhat.com>, Namhyung Kim <namhyung@kernel.org>,
Andi Kleen <ak@linux.intel.com>
Subject: Re: [PATCH 04/12] perf, x86: Support the TSX intx/intx_cp qualifiers v2
Date: Mon, 28 Jan 2013 18:37:36 +0100 [thread overview]
Message-ID: <20130128173736.GT30577@one.firstfloor.org> (raw)
In-Reply-To: <CABPqkBQ5cn4SQ8MH3vrPHcyy=pGbsVbxYPjETCCo=oRsx_nEdg@mail.gmail.com>
> This silently drops intx=1 for unhalted_ref_cycles. This event
> only works on fixed counter. So I am wondering what I am measuring
> here. In general, I don't like when settings are silently dropped because
> the user will be misled into thinking the modifier was applied when in
> fact it was not.
Ok. I can look at it later, but I don't think it's a show stopper.
Error handling in general was never a strength of perf.
-Andi
next prev parent reply other threads:[~2013-01-28 17:37 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-25 22:00 Basic perf PMU support for Haswell v1 Andi Kleen
2013-01-25 22:00 ` [PATCH 01/12] perf, x86: Add PEBSv2 record support Andi Kleen
2013-01-28 13:15 ` Stephane Eranian
2013-01-28 16:10 ` Andi Kleen
2013-01-31 17:15 ` Stephane Eranian
2013-01-25 22:00 ` [PATCH 02/12] perf, x86: Basic Haswell PMU support v2 Andi Kleen
2013-01-28 15:34 ` Stephane Eranian
2013-01-28 16:16 ` Andi Kleen
2013-01-25 22:00 ` [PATCH 03/12] perf, x86: Basic Haswell PEBS support v3 Andi Kleen
2013-01-28 15:56 ` Stephane Eranian
2013-01-25 22:00 ` [PATCH 04/12] perf, x86: Support the TSX intx/intx_cp qualifiers v2 Andi Kleen
2013-01-26 11:54 ` Ingo Molnar
2013-01-26 21:00 ` Andi Kleen
2013-01-27 13:14 ` Ingo Molnar
[not found] ` <20130128050234.GQ30577@one.firstfloor.org>
2013-01-28 10:47 ` Ingo Molnar
2013-01-28 16:52 ` Stephane Eranian
2013-01-28 17:37 ` Andi Kleen [this message]
2013-01-25 22:00 ` [PATCH 05/12] perf, x86: Support Haswell v4 LBR format Andi Kleen
2013-01-28 21:47 ` Stephane Eranian
2013-01-28 22:08 ` Andi Kleen
2013-01-28 22:20 ` Stephane Eranian
2013-01-25 22:00 ` [PATCH 06/12] perf, x86: Support full width counting Andi Kleen
2013-01-25 22:00 ` [PATCH 07/12] perf, x86: Avoid checkpointed counters causing excessive TSX aborts v3 Andi Kleen
2013-01-28 22:32 ` Stephane Eranian
2013-01-28 23:16 ` Andi Kleen
2013-01-29 0:30 ` Stephane Eranian
2013-01-29 1:00 ` Andi Kleen
2013-01-30 8:51 ` Stephane Eranian
2013-01-30 20:58 ` Andi Kleen
2013-01-25 22:00 ` [PATCH 08/12] perf, x86: Move NMI clearing to end of PMI handler after the counter registers are reset Andi Kleen
2013-01-25 22:00 ` [PATCH 09/12] perf, x86: Disable LBR recording for unknown LBR_FMT Andi Kleen
2013-01-25 22:00 ` [PATCH 10/12] perf, x86: Support LBR filtering by INTX/NOTX/ABORT v2 Andi Kleen
2013-01-25 22:00 ` [PATCH 11/12] perf, tools: Support sorting by intx, abort branch flags v2 Andi Kleen
2013-01-25 22:00 ` [PATCH 12/12] perf, tools: Add abort_tx,no_tx,in_tx branch filter options to perf record -j v3 Andi Kleen
2013-01-31 17:19 ` Basic perf PMU support for Haswell v1 Stephane Eranian
2013-01-31 17:47 ` Andi Kleen
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