From: Gleb Natapov <gleb@redhat.com>
To: Yang Zhang <yang.z.zhang@intel.com>
Cc: kvm@vger.kernel.org, haitao.shan@intel.com, mtosatti@redhat.com,
xiantao.zhang@intel.com
Subject: Re: [PATCH v13 0/3] x86, apicv: Add APIC virtualization support
Date: Tue, 29 Jan 2013 11:01:26 +0200 [thread overview]
Message-ID: <20130129090126.GJ22871@redhat.com> (raw)
In-Reply-To: <1359080331-22872-1-git-send-email-yang.z.zhang@intel.com>
On Fri, Jan 25, 2013 at 10:18:48AM +0800, Yang Zhang wrote:
> From: Yang Zhang <yang.z.zhang@Intel.com>
>
> APIC virtualization is a new feature which can eliminate most of VM exit
> when vcpu handle a interrupt:
>
> APIC register virtualization:
> APIC read access doesn't cause APIC-access VM exits.
> APIC write becomes trap-like.
>
> Virtual interrupt delivery:
> Virtual interrupt delivery avoids KVM to inject vAPIC interrupts
> manually, which is fully taken care of by the hardware.
>
> The first patch adds APIC register virtualization supporting.
> The second patch adds virtual x2apic mode supporting since it is required by APICv when guest uses msr based way to access APIC.
> The third patch adds virtual interrupt delivery supporting.
>
Added braces to vmx_set_msr_bitmap() for clarity and applied. Thanks.
> Please refer to Intel SDM volume 3, chapter 29 for more details.
> Changes v12 to v13:
> * Remove unnecessary check when set virtualized apic access
> * Use vm_need_tpr_shadow() instead read vmcs to check tpr.
> * Check irqchip_in_kernel when set msr bitmap.
> * Correct comment format
> * Remove unnecessary callback when set eoi exit bitmap.
> * Disable vid when irqchip is in userspace.
> * Rename vmx_vcpu_has_apicv to vmx_vm_has_apicv.
> * Rebased on top of KVM upstream
>
> Changes v11 to v12:
> * Check irqchip in kernel when enabling apicv, if using userspace irq chip,
> apicv cannot be used and must be disabled.
> * Rename some fucntion to more descriptive name.
> * Move ioapic entry pase logic to lapic.c
> * Rebased on top of KVM upstream
>
> Changes v10 to v11:
> * Use two new msr bitmaps for guest that enabling x2apic mode:
> Since msr bitmap is shared by all guests, it will break guest that
> not using x2apic when updating the global msr bitmap. To solve this,
> we use two new msr bitmap for guest which using x2apic.
>
> Changes v9 to v10:
> * Enable virtualize x2apic mode when guest is using x2apic and apicv:
> There is no point to enable x2apic mode when apicv is disabled.
> * Grep ioapic_lock when traversing ioapic entry to set eoi exit bitmap
> * Rebased on top of KVM upstream
>
> Changes v8 to v9:
> * Update eoi exit bitmap by vcpu itself.
> * Enable virtualize x2apic mode when guest is using x2apic.
> * Rebase on top of KVM upstream
>
> Changes v7 to v8:
> * According Marcelo's suggestion, add comments for irr_pending and isr_count,
> since the two valiables have different meaning when using apicv.
> * Set highest bit in vISR to SVI after migation.
> * Use spinlock to access eoi exit bitmap synchronously.
> * Enable virtualize x2apic mode when guest is using x2apic
> * Rebased on top of KVM upstream.
>
>
> Yang Zhang (3):
> x86, apicv: add APICv register virtualization support
> x86, apicv: add virtual x2apic support
> x86, apicv: add virtual interrupt delivery support
>
> arch/ia64/kvm/lapic.h | 6 +
> arch/x86/include/asm/kvm_host.h | 6 +
> arch/x86/include/asm/vmx.h | 14 ++
> arch/x86/kvm/irq.c | 56 ++++++-
> arch/x86/kvm/lapic.c | 140 +++++++++++++----
> arch/x86/kvm/lapic.h | 34 ++++
> arch/x86/kvm/svm.c | 24 +++
> arch/x86/kvm/vmx.c | 327 ++++++++++++++++++++++++++++++++++++---
> arch/x86/kvm/x86.c | 23 +++-
> include/linux/kvm_host.h | 3 +
> virt/kvm/ioapic.c | 39 +++++
> virt/kvm/ioapic.h | 4 +
> virt/kvm/irq_comm.c | 25 +++
> virt/kvm/kvm_main.c | 5 +
> 14 files changed, 647 insertions(+), 59 deletions(-)
--
Gleb.
prev parent reply other threads:[~2013-01-29 9:01 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-25 2:18 [PATCH v13 0/3] x86, apicv: Add APIC virtualization support Yang Zhang
2013-01-25 2:18 ` [PATCH v13 1/3] x86, apicv: add APICv register " Yang Zhang
2013-01-25 2:18 ` [PATCH v13 2/3] x86, apicv: add virtual x2apic support Yang Zhang
2013-01-25 2:18 ` [PATCH v13 3/3] x86, apicv: add virtual interrupt delivery support Yang Zhang
2013-01-28 22:03 ` [PATCH v13 0/3] x86, apicv: Add APIC virtualization support Marcelo Tosatti
2013-01-29 9:01 ` Gleb Natapov [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20130129090126.GJ22871@redhat.com \
--to=gleb@redhat.com \
--cc=haitao.shan@intel.com \
--cc=kvm@vger.kernel.org \
--cc=mtosatti@redhat.com \
--cc=xiantao.zhang@intel.com \
--cc=yang.z.zhang@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.