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diff for duplicates of <20130208004414.GA32245@obsidianresearch.com>

diff --git a/a/1.txt b/N1/1.txt
index a3bfd09..0fb88d8 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,5 +1,5 @@
 On Thu, Feb 07, 2013 at 11:25:23PM +0000, Arnd Bergmann wrote:
-> > link@0 {
+> > link at 0 {
 > > reg = <0x800 0 0  0 0>; // Bus 0, Dev 0x10, Fn 0
 > > interrupt-mask = <0x0 0 0 7>;
 > > interrupt-map = <0x0000 0 0 1 &mpic 58 // INTA
@@ -52,7 +52,7 @@ If you imagine the case you alluded to, a PCI-E root port, connected
 to a PCI-E to PCI bridge, with 2 physical PCI bus slots. The
 interrupts for the 2 slots are routed to the CPU directly:
 
-link@0 {
+link at 0 {
  reg = </* Bus 0, Dev 0x10, Fn 0 */>; // Root Port bridge
 
   // Match on INTx (not used since the pci-bridge doesn't create inband INTx)
@@ -74,7 +74,7 @@ link@0 {
 To me, this seems to be a much more accurate description of how the
 hardware is constructed then trying to cram all this information into
 the host bridge's interrupt map. It shows clearly where inband INTA
-messages arriving at the root port are directed as well as where the
+messages arriving@the root port are directed as well as where the
 slot by slot out-of-band interrupt wires on the PCI bus are directed.
 
 Jason
diff --git a/a/content_digest b/N1/content_digest
index 15ccbea..5403860 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,31 +2,14 @@
  "ref\020130207183743.5c97d8b8@skate\0"
  "ref\020130207182153.GB24688@obsidianresearch.com\0"
  "ref\0201302072325.23483.arnd@arndb.de\0"
- "From\0Jason Gunthorpe <jgunthorpe@obsidianresearch.com>\0"
- "Subject\0Re: [PATCH v2 19/27] pci: PCIe driver for Marvell Armada 370/XP systems\0"
+ "From\0jgunthorpe@obsidianresearch.com (Jason Gunthorpe)\0"
+ "Subject\0[PATCH v2 19/27] pci: PCIe driver for Marvell Armada 370/XP systems\0"
  "Date\0Thu, 7 Feb 2013 17:44:14 -0700\0"
- "To\0Arnd Bergmann <arnd@arndb.de>\0"
- "Cc\0Thomas Petazzoni <thomas.petazzoni@free-electrons.com>"
-  Andrew Murray <andrew.murray@arm.com>
-  Bjorn Helgaas <bhelgaas@google.com>
-  linux-pci@vger.kernel.org <linux-pci@vger.kernel.org>
-  linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>
-  Jason Cooper <jason@lakedaemon.net>
-  Andrew Lunn <andrew@lunn.ch>
-  Gregory Clement <gregory.clement@free-electrons.com>
-  Maen Suleiman <maen@marvell.com>
-  Lior Amsalem <alior@marvell.com>
-  Thierry Reding <thierry.reding@avionic-design.de>
-  Eran Ben-Avi <benavi@marvell.com>
-  Nadav Haklai <nadavh@marvell.com>
-  Shadi Ammouri <shadi@marvell.com>
-  Tawfik Bayouk <tawfik@marvell.com>
-  Stephen Warren <swarren@wwwdotorg.org>
- " Russell King - ARM Linux <linux@arm.linux.org.uk>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "On Thu, Feb 07, 2013 at 11:25:23PM +0000, Arnd Bergmann wrote:\n"
- "> > link@0 {\n"
+ "> > link at 0 {\n"
  "> > reg = <0x800 0 0  0 0>; // Bus 0, Dev 0x10, Fn 0\n"
  "> > interrupt-mask = <0x0 0 0 7>;\n"
  "> > interrupt-map = <0x0000 0 0 1 &mpic 58 // INTA\n"
@@ -79,7 +62,7 @@
  "to a PCI-E to PCI bridge, with 2 physical PCI bus slots. The\n"
  "interrupts for the 2 slots are routed to the CPU directly:\n"
  "\n"
- "link@0 {\n"
+ "link at 0 {\n"
  " reg = </* Bus 0, Dev 0x10, Fn 0 */>; // Root Port bridge\n"
  "\n"
  "  // Match on INTx (not used since the pci-bridge doesn't create inband INTx)\n"
@@ -101,9 +84,9 @@
  "To me, this seems to be a much more accurate description of how the\n"
  "hardware is constructed then trying to cram all this information into\n"
  "the host bridge's interrupt map. It shows clearly where inband INTA\n"
- "messages arriving at the root port are directed as well as where the\n"
+ "messages arriving@the root port are directed as well as where the\n"
  "slot by slot out-of-band interrupt wires on the PCI bus are directed.\n"
  "\n"
  Jason
 
-bfd437c228abb229b141754b6aa0cdfa0f5507c80ee9d8dec673257578de217d
+5a61a84167d74946cd5512c664cfbd4c1f8473d382e491be1d3b8b727fff69e9

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