From: Ingo Molnar <mingo@kernel.org>
To: Andi Kleen <andi@firstfloor.org>
Cc: mingo@elte.hu, linux-kernel@vger.kernel.org, eranian@google.com,
Andi Kleen <ak@linux.intel.com>
Subject: Re: [PATCH 2/5] perf, x86: Basic Haswell PMU support v4
Date: Wed, 13 Feb 2013 09:16:36 +0100 [thread overview]
Message-ID: <20130213081636.GA4542@gmail.com> (raw)
In-Reply-To: <1360706658-13468-3-git-send-email-andi@firstfloor.org>
* Andi Kleen <andi@firstfloor.org> wrote:
> +static int hsw_hw_config(struct perf_event *event)
> +{
> + int ret = intel_pmu_hw_config(event);
> +
> + if (ret)
> + return ret;
> + if (!boot_cpu_has(X86_FEATURE_RTM) && !boot_cpu_has(X86_FEATURE_HLE))
> + return 0;
> + event->hw.config |= event->attr.config & (HSW_INTX|HSW_INTX_CHECKPOINTED);
> +
> + /*
> + * INTX/INTX-CP do not play well with PEBS or ANY thread mode.
> + */
> + if ((event->hw.config & (HSW_INTX|HSW_INTX_CHECKPOINTED)) &&
> + ((event->hw.config & ARCH_PERFMON_EVENTSEL_ANY) ||
> + event->attr.precise_ip > 0))
> + return -EOPNOTSUPP;
Please explain it more verbosely in the comment what 'do not
play well' means and why it necessiates a -EOPNOTSUPP reply.
Thanks,
Ingo
next prev parent reply other threads:[~2013-02-13 8:16 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-12 22:04 Basic perf PMU support for Haswell v6 Andi Kleen
2013-02-12 22:04 ` [PATCH 1/5] perf, x86: Add Haswell PEBS record support v3 Andi Kleen
2013-02-12 22:04 ` [PATCH 2/5] perf, x86: Basic Haswell PMU support v4 Andi Kleen
2013-02-13 8:16 ` Ingo Molnar [this message]
2013-02-12 22:04 ` [PATCH 3/5] perf, x86: Basic Haswell PEBS " Andi Kleen
2013-02-12 22:04 ` [PATCH 4/5] perf, x86: Support full width counting v3 Andi Kleen
2013-02-12 22:04 ` [PATCH 5/5] perf, x86: Move NMI clearing to end of PMI handler after the counter registers are reset Andi Kleen
2013-03-12 13:02 ` Basic perf PMU support for Haswell v6 Stephane Eranian
2013-03-12 13:58 ` Ingo Molnar
2013-03-12 14:13 ` Stephane Eranian
-- strict thread matches above, loose matches on Subject: below --
2013-02-07 19:23 Basic perf PMU support for Haswell v5 Andi Kleen
2013-02-07 19:23 ` [PATCH 2/5] perf, x86: Basic Haswell PMU support v4 Andi Kleen
2013-02-05 1:49 Basic perf PMU support for Haswell v4 Andi Kleen
2013-02-05 1:49 ` [PATCH 2/5] perf, x86: Basic Haswell PMU support v4 Andi Kleen
2013-02-02 1:54 Basic perf PMU support for Haswell v3 Andi Kleen
2013-02-02 1:54 ` [PATCH 2/5] perf, x86: Basic Haswell PMU support v4 Andi Kleen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20130213081636.GA4542@gmail.com \
--to=mingo@kernel.org \
--cc=ak@linux.intel.com \
--cc=andi@firstfloor.org \
--cc=eranian@google.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@elte.hu \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.