From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915: Eliminate race from gen2/3 page flip interrupt handling Date: Mon, 18 Feb 2013 14:27:24 +0200 Message-ID: <20130218122724.GN9135@intel.com> References: <1361188671-11639-1-git-send-email-ville.syrjala@linux.intel.com> <20130218121609.GG16131@cantiga.alporthouse.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 85B83E6096 for ; Mon, 18 Feb 2013 04:27:27 -0800 (PST) Content-Disposition: inline In-Reply-To: <20130218121609.GG16131@cantiga.alporthouse.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Mon, Feb 18, 2013 at 12:16:09PM +0000, Chris Wilson wrote: > On Mon, Feb 18, 2013 at 01:57:51PM +0200, ville.syrjala@linux.intel.com w= rote: > > From: Ville Syrj=E4l=E4 > > = > > If the interrupt handler were to process a previous vblank interrupt and > > the following flip pending interrupt at the same time, the page flip > > would be complete too soon. > > = > > To eliminate this race check the live pending flip status from the ISR > > register before finishing the page flip. > = > Ok, that makes a lot of sense. > = > /* We detect FlipDone by looking for the change in PendingFlip from '1' > * to '0' on the following vblank, i.e. IIR has the Pendingflip > * asserted following the MI_DISPLAY_FLIP, but ISR is deasserted, hence > * the flip is completed (no longer pending). Since this doesn't raise an > * interrupt per-se, we watch for the change at vblank. > */ You want me to include that comment somewhere in the code? > > Signed-off-by: Ville Syrj=E4l=E4 > Reviewed-by: Chris Wilson = > Time to give it a quick test and make sure it doesn't break a ton of > assumptions... :) > -Chris > = > -- = > Chris Wilson, Intel Open Source Technology Centre -- = Ville Syrj=E4l=E4 Intel OTC