From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 13/28] drm/i915: fix VLV limits and m/n/p calculations Date: Tue, 5 Mar 2013 13:49:17 +0200 Message-ID: <20130305114917.GR4469@intel.com> References: <1362172471-7643-1-git-send-email-jbarnes@virtuousgeek.org> <1362172471-7643-14-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 51791E610F for ; Tue, 5 Mar 2013 03:49:27 -0800 (PST) Content-Disposition: inline In-Reply-To: <1362172471-7643-14-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, Mar 01, 2013 at 01:14:16PM -0800, Jesse Barnes wrote: > For high res modes m n p calculation is fixed for VLV platform. > = > Signed-off-by: Vijay Purushothaman > Signed-off-by: Pallavi G > Signed-off-by: Yogesh M > Signed-off-by: Gajanan Bhat > --- > drivers/gpu/drm/i915/intel_display.c | 31 +++++++++++++++++++++-------= --- > 1 file changed, 21 insertions(+), 10 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/= intel_display.c > index 3b189fa..fd4a0d4 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -380,21 +380,21 @@ static const intel_limit_t intel_limits_vlv_dac =3D= { > .m1 =3D { .min =3D 2, .max =3D 3 }, > .m2 =3D { .min =3D 11, .max =3D 156 }, > .p =3D { .min =3D 10, .max =3D 30 }, > - .p1 =3D { .min =3D 2, .max =3D 3 }, > + .p1 =3D { .min =3D 1, .max =3D 3 }, > .p2 =3D { .dot_limit =3D 270000, > .p2_slow =3D 2, .p2_fast =3D 20 }, > .find_pll =3D intel_vlv_find_best_pll, > }; > = > static const intel_limit_t intel_limits_vlv_hdmi =3D { > - .dot =3D { .min =3D 20000, .max =3D 165000 }, > - .vco =3D { .min =3D 4000000, .max =3D 5994000}, > - .n =3D { .min =3D 1, .max =3D 7 }, > + .dot =3D { .min =3D 25000, .max =3D 180000 }, > + .vco =3D { .min =3D 4040000, .max =3D 5960000 }, > + .n =3D { .min =3D 1, .max =3D 5 }, > .m =3D { .min =3D 60, .max =3D 300 }, /* guess */ > .m1 =3D { .min =3D 2, .max =3D 3 }, > - .m2 =3D { .min =3D 11, .max =3D 156 }, > + .m2 =3D { .min =3D 15, .max =3D 149 }, > .p =3D { .min =3D 10, .max =3D 30 }, > - .p1 =3D { .min =3D 2, .max =3D 3 }, > + .p1 =3D { .min =3D 1, .max =3D 3 }, > .p2 =3D { .dot_limit =3D 270000, > .p2_slow =3D 2, .p2_fast =3D 20 }, > .find_pll =3D intel_vlv_find_best_pll, > @@ -408,7 +408,7 @@ static const intel_limit_t intel_limits_vlv_dp =3D { > .m1 =3D { .min =3D 2, .max =3D 3 }, > .m2 =3D { .min =3D 11, .max =3D 156 }, > .p =3D { .min =3D 10, .max =3D 30 }, > - .p1 =3D { .min =3D 2, .max =3D 3 }, > + .p1 =3D { .min =3D 1, .max =3D 3 }, > .p2 =3D { .dot_limit =3D 270000, > .p2_slow =3D 2, .p2_fast =3D 20 }, > .find_pll =3D intel_vlv_find_best_pll, > @@ -809,10 +809,14 @@ intel_vlv_find_best_pll(const intel_limit_t *limit,= struct drm_crtc *crtc, > int target, int refclk, intel_clock_t *match_clock, > intel_clock_t *best_clock) > { > +#define LONG_OVERFLOW 0x7FFFFFFF > +#define DIFF_OVERFLOW (LONG_OVERFLOW/10000) > + > u32 p1, p2, m1, m2, vco, bestn, bestm1, bestm2, bestp1, bestp2; > u32 m, n, fastclk; > u32 updrate, minupdate, fracbits, p; > - unsigned long bestppm, ppm, absppm; > + long bestppm, ppm, absppm, ppmdiff, absppmdiff; > + unsigned long ulMult =3D 1; > int dotclk, flag; > = > flag =3D 0; > @@ -841,8 +845,15 @@ intel_vlv_find_best_pll(const intel_limit_t *limit, = struct drm_crtc *crtc, > m =3D m1 * m2; > vco =3D updrate * m; > if (vco >=3D limit->vco.min && vco < limit->vco.max) { > - ppm =3D 1000000 * ((vco / p) - fastclk) / fastclk; > - absppm =3D (ppm > 0) ? ppm : (-ppm); > + ppmdiff =3D ((100*vco)/p) - (100*fastclk); > + absppmdiff =3D (ppmdiff > 0) ? ppmdiff : (-ppmdiff); > + ulMult =3D 1; > + while (absppmdiff > DIFF_OVERFLOW) { > + absppmdiff /=3D 10; > + ulMult *=3D 10; > + } > + absppm =3D ((absppmdiff*10000)/fastclk)*ulMult; > + This seems to expect long to be >32 bits. If it needs 64bit math it should use proper sized types, and of course the division needs to use something like div_s64(). Also it should use abs()/abs64() instead of the open-coded versions. That would also allow getting rid of some of these temporary variables. > if (absppm < 100 && ((p1 * p2) > (bestp1 * bestp2))) { > bestppm =3D 0; > flag =3D 1; > -- = > 1.7.9.5 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC