From mboxrd@z Thu Jan 1 00:00:00 1970 From: Konrad Rzeszutek Wilk Subject: Re: [PATCH 2/2] x86/Intel: Add missing Merom, Westmere, and Nehelem models. Date: Tue, 5 Mar 2013 09:00:11 -0500 Message-ID: <20130305140011.GC2589@phenom.dumpdata.com> References: <1362148308-4429-1-git-send-email-konrad.wilk@oracle.com> <1738683.aq3Wrk796J@amur> <20130304180151.GA11245@phenom.dumpdata.com> <1717580.KIJivfAHPK@amur> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Content-Disposition: inline In-Reply-To: <1717580.KIJivfAHPK@amur> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Dietmar Hahn Cc: boris.ostrovsky@oracle.com, Jan Beulich , jun.nakajima@intel.com, xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org On Tue, Mar 05, 2013 at 02:49:22PM +0100, Dietmar Hahn wrote: > Am Montag 04 M=E4rz 2013, 13:01:51 schrieb Konrad Rzeszutek Wilk: > > On Mon, Mar 04, 2013 at 09:15:35AM +0100, Dietmar Hahn wrote: > > > Am Freitag 01 M=E4rz 2013, 15:53:11 schrieb Jan Beulich: > > > > >>> On 01.03.13 at 15:31, Konrad Rzeszutek Wilk wrote: > > > > > Mainly 22 (Merom-L); 30 (Nehelem); and 37, 44 (Westmere). > > > > = > > > > Assuming Intel confirms this, I'm fine with adding those. > > > > = > > > > > --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c > > > > > +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c > > > > > @@ -738,14 +738,25 @@ int vmx_vpmu_initialise(struct vcpu *v, uns= igned int vpmu_flags) > > > > > { > > > > > switch ( cpu_model ) > > > > > { > > > > > + /* Core2: */ > > > > > case 15: /* original 65 nm celeron/pentium/core2/xeon, "= Merom"/"Conroe" */ > > > > > + case 22: /* single-core 65 nm celeron/core2solo "Merom-L= "/"Conroe-L" */ > > > > > case 23: /* current 45 nm celeron/core2/xeon "Penryn"/"W= olfdale" */ > > > > > - case 26: /* 45 nm nehalem, "Bloomfield" */ > > > > > case 29: /* six-core 45 nm xeon "Dunnington" */ > > > > > + > > > > > case 42: /* SandyBridge */ > > > > > case 45: /* SandyBridge, "Romely-EP" */ > > > > > + > > > > > + /* Nehelem: */ > > > > = > > > > Nehalem > > > > = > > > > > + case 26: /* 45 nm nehalem, "Bloomfield" */ > > > > > + case 30: /* 45 nm nehalem, "Lynnfield" */ > > > > > case 46: /* 45 nm nehalem-ex, "Beckton" */ > > > > > + > > > > > + /* Westmere: */ > > > > > + case 37: /* 32 nm nehalem, "Clarkdale" */ > > > > > + case 44: /* 32 nm nehalem, "Gulftown" */ > > > > > case 47: /* 32 nm Xeon E7 */ > > > > > + > > > > > case 58: /* IvyBridge */ > > > > > case 62: /* IvyBridge EP */ > > > > > ret =3D core2_vpmu_initialise(v, vpmu_flags); > > > > = > > > > I guess the main reason these weren't here is that no-one actively > > > > tested the code on them. Fujitsu has been completing this list as > > > > they ran into systems missing here yet they were able to test on... > > > = > > > Yes we did some extensions but only with processors we were able to t= est > > > because we ran into trouble with some of these. > > = > > What were those problems? Could you report them on xen-devel please? > = > This is old stuff: > http://lists.xen.org/archives/html/xen-devel/2010-11/msg01157.html And it looks like it is part of the Xen tree now? commit 3ed6a063d2a5f6197306b030e8c27c36d5f31aa1 Author: Keir Fraser Date: Mon Nov 22 19:16:34 2010 +0000 x86 hvm: Fix VPMU issue on Nehalem cpus = Fix an issue on Nehalem cpus where performance counter overflows may lead to endless interrupt loops on this cpu. = Signed-off-by: Dietmar Hahn > = > Dietmar. > = > -- = > Company details: http://ts.fujitsu.com/imprint.html