diff for duplicates of <20130306105441.4d24033e@skate> diff --git a/a/1.txt b/N1/1.txt index b9029cc..57f572b 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -2,7 +2,7 @@ Dear Jason Gunthorpe, On Tue, 12 Feb 2013 15:35:11 -0700, Jason Gunthorpe wrote: -> > + pcie@0,0 { +> > + pcie at 0,0 { > > + device_type = "pciex"; > > + reg = <0x0800 0 0xd0040000 0 0x2000>; > @@ -19,7 +19,7 @@ On Tue, 12 Feb 2013 15:35:11 -0700, Jason Gunthorpe wrote: > ranges = <0x81000000 0 0 0xc0000000 0 0x00010000 /* downstream I/O */ > 0x82000000 0 0 0xc1000000 0 0x08000000>; /* non-prefetchable memory */ > -> pcie@0,0 { +> pcie at 0,0 { > device_type = "pci"; > reg = <0x0800 0 0 0>; // 00:01.0 (????) > marvell,pcie-port = <0>; @@ -32,11 +32,11 @@ On Tue, 12 Feb 2013 15:35:11 -0700, Jason Gunthorpe wrote: The Device Tree would really look odd. We have one register range for each PCIe interface, but instead of nicely putting them inside the -pcie@X,Y subnodes, we have a global regs = <..> property at the +pcie at X,Y subnodes, we have a global regs = <..> property at the pcie-controller level? I can do that if you want, but it really sounds like the standard PCI DT bindings are horrible. Those register ranges are *per* PCIe interface, so any logical person would expect them -inside the pcie@X,Y node... +inside the pcie at X,Y node... But ok, if that's the way things should be, so be it. diff --git a/a/content_digest b/N1/content_digest index de516dc..697aa84 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,33 +1,17 @@ "ref\01360686546-24277-1-git-send-email-thomas.petazzoni@free-electrons.com\0" "ref\01360686546-24277-25-git-send-email-thomas.petazzoni@free-electrons.com\0" "ref\020130212223511.GB31555@obsidianresearch.com\0" - "From\0Thomas Petazzoni <thomas.petazzoni@free-electrons.com>\0" - "Subject\0Re: [PATCH 24/32] pci: PCIe driver for Marvell Armada 370/XP systems\0" + "From\0thomas.petazzoni@free-electrons.com (Thomas Petazzoni)\0" + "Subject\0[PATCH 24/32] pci: PCIe driver for Marvell Armada 370/XP systems\0" "Date\0Wed, 6 Mar 2013 10:54:41 +0100\0" - "To\0Jason Gunthorpe <jgunthorpe@obsidianresearch.com>\0" - "Cc\0Lior Amsalem <alior@marvell.com>" - Andrew Lunn <andrew@lunn.ch> - Russell King - ARM Linux <linux@arm.linux.org.uk> - Jason Cooper <jason@lakedaemon.net> - Arnd Bergmann <arnd@arndb.de> - Stephen Warren <swarren@wwwdotorg.org> - linux-pci@vger.kernel.org - Thierry Reding <thierry.reding@avionic-design.de> - Eran Ben-Avi <benavi@marvell.com> - Nadav Haklai <nadavh@marvell.com> - Maen Suleiman <maen@marvell.com> - Shadi Ammouri <shadi@marvell.com> - Bjorn Helgaas <bhelgaas@google.com> - Gregory Clement <gregory.clement@free-electrons.com> - Tawfik Bayouk <tawfik@marvell.com> - " linux-arm-kernel@lists.infradead.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Dear Jason Gunthorpe,\n" "\n" "On Tue, 12 Feb 2013 15:35:11 -0700, Jason Gunthorpe wrote:\n" "\n" - "> > +\tpcie@0,0 {\n" + "> > +\tpcie at 0,0 {\n" "> > +\t\tdevice_type = \"pciex\";\n" "> > +\t\treg = <0x0800 0 0xd0040000 0 0x2000>;\n" "> \n" @@ -44,7 +28,7 @@ "> ranges = <0x81000000 0 0 0xc0000000 0 0x00010000 /* downstream I/O */\n" "> 0x82000000 0 0 0xc1000000 0 0x08000000>; /* non-prefetchable memory */\n" "> \n" - "> pcie@0,0 {\n" + "> pcie at 0,0 {\n" "> device_type = \"pci\";\n" "> reg = <0x0800 0 0 0>; // 00:01.0 (????)\n" "> marvell,pcie-port = <0>;\n" @@ -57,11 +41,11 @@ "\n" "The Device Tree would really look odd. We have one register range for\n" "each PCIe interface, but instead of nicely putting them inside the\n" - "pcie@X,Y subnodes, we have a global regs = <..> property at the\n" + "pcie at X,Y subnodes, we have a global regs = <..> property at the\n" "pcie-controller level? I can do that if you want, but it really sounds\n" "like the standard PCI DT bindings are horrible. Those register ranges\n" "are *per* PCIe interface, so any logical person would expect them\n" - "inside the pcie@X,Y node...\n" + "inside the pcie at X,Y node...\n" "\n" "But ok, if that's the way things should be, so be it.\n" "\n" @@ -74,4 +58,4 @@ "development, consulting, training and support.\n" http://free-electrons.com -d86bfec3957f52edcbd6602c60a9889e389c8498de46a476ad8cbac0446df905 +6d139e080910fa57583900d355a06c5250e5abdfda682e5ccf7fc2aa464ee4a0
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