diff for duplicates of <20130309013152.GA3883@obsidianresearch.com> diff --git a/a/1.txt b/N1/1.txt index aff5c60..0ed4386 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -39,7 +39,7 @@ cycles, and it knows how to deliver configuration cycles on bus 0 to the bridges. This one: -+ pcie@0,0 { ++ pcie at 0,0 { + device_type = "pci"; + reg = <0x0800 0 0 0 0>; @@ -61,7 +61,7 @@ So, from that point, does the DT start to make sense? Are there other problems? The question at hand is how do you associate the non-PCI MMIO space -0xd0040000 with the root port bridge 'pcie@1,0' ? The patch proposes +0xd0040000 with the root port bridge 'pcie at 1,0' ? The patch proposes to use a reg array in the controller plus reg-names to do this. I have trouble making sense of your suggestions to switch away from diff --git a/a/content_digest b/N1/content_digest index 4170b09..f71b76f 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -8,24 +8,10 @@ "ref\0513A3F4F.2090501@firmworks.com\0" "ref\020130308200245.GC29435@obsidianresearch.com\0" "ref\0513A7845.6040304@firmworks.com\0" - "From\0Jason Gunthorpe <jgunthorpe@obsidianresearch.com>\0" - "Subject\0Re: [PATCH 24/32] pci: PCIe driver for Marvell Armada 370/XP systems\0" + "From\0jgunthorpe@obsidianresearch.com (Jason Gunthorpe)\0" + "Subject\0[PATCH 24/32] pci: PCIe driver for Marvell Armada 370/XP systems\0" "Date\0Fri, 8 Mar 2013 18:31:52 -0700\0" - "To\0Mitch Bradley <wmb@firmworks.com>\0" - "Cc\0Thierry Reding <thierry.reding@avionic-design.de>" - Lior Amsalem <alior@marvell.com> - Russell King - ARM Linux <linux@arm.linux.org.uk> - Jason Cooper <jason@lakedaemon.net> - Andrew Lunn <andrew@lunn.ch> - linux-pci@vger.kernel.org - devicetree-discuss@lists.ozlabs.org - Eran Ben-Avi <benavi@marvell.com> - Nadav Haklai <nadavh@marvell.com> - Maen Suleiman <maen@marvell.com> - Bjorn Helgaas <bhelgaas@google.com> - Shadi Ammouri <shadi@marvell.com> - Tawfik Bayouk <tawfik@marvell.com> - " linux-arm-kernel@lists.infradead.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Fri, Mar 08, 2013 at 01:46:13PM -1000, Mitch Bradley wrote:\n" @@ -69,7 +55,7 @@ "the bridges.\n" "\n" "This one:\n" - "+\t\t\tpcie@0,0 {\n" + "+\t\t\tpcie at 0,0 {\n" "+\t\t\t\tdevice_type = \"pci\";\n" "+\t\t\t\treg = <0x0800 0 0 0 0>;\n" "\n" @@ -91,7 +77,7 @@ "problems?\n" "\n" "The question at hand is how do you associate the non-PCI MMIO space\n" - "0xd0040000 with the root port bridge 'pcie@1,0' ? The patch proposes\n" + "0xd0040000 with the root port bridge 'pcie at 1,0' ? The patch proposes\n" "to use a reg array in the controller plus reg-names to do this.\n" "\n" "I have trouble making sense of your suggestions to switch away from\n" @@ -120,4 +106,4 @@ "Thanks a lot for looking at this,\n" Jason -28cfd301ba07f563a6c935609db00389804531a6b461330bc9fa39716b1f664c +66f21057d7c4e9c4f02b1961789f0c1c7bb94adeaa2d8222abfd951d59be8834
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