From: Albert ARIBAUD <albert.u.boot@aribaud.net>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/3] ARM: implement some Cortex-A9 errata workarounds
Date: Fri, 15 Mar 2013 06:58:56 +0100 [thread overview]
Message-ID: <20130315065856.26189b3f@lilith> (raw)
In-Reply-To: <1361917709-11536-1-git-send-email-swarren@wwwdotorg.org>
Hi Stephen,
On Tue, 26 Feb 2013 15:28:27 -0700, Stephen Warren
<swarren@wwwdotorg.org> wrote:
> From: Stephen Warren <swarren@nvidia.com>
>
> Various errata exist in the Cortex-A9 CPU, and may be worked around by
> setting some bits in a CP15 diagnostic register. Add code to implement
> the workarounds, enabled by new CONFIG_ options.
>
> This code was taken from the Linux kernel, v3.8, arch/arm/mm/proc-v7.S,
> and modified to remove the logic to conditionally apply the WAR (since we
> know exactly which CPU we're running on given the U-Boot configuration),
> and use r0 instead of r10 for consistency with the rest of U-Boot's
> cpu_init_cp15().
>
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> ---
> README | 10 ++++++++++
> arch/arm/cpu/armv7/start.S | 19 +++++++++++++++++++
> 2 files changed, 29 insertions(+)
>
> diff --git a/README b/README
> index d8cb394..f2b1c88 100644
> --- a/README
> +++ b/README
> @@ -485,6 +485,16 @@ The following options need to be configured:
> Thumb2 this flag will result in Thumb2 code generated by
> GCC.
>
> + CONFIG_ARM_ERRATA_742230
> + CONFIG_ARM_ERRATA_743622
> + CONFIG_ARM_ERRATA_751472
> +
> + If set, the workarounds for these ARM errata are applied early
> + during U-Boot startup. Note that these options force the
> + workarounds to be applied; no CPU-type/version detection
> + exists, unlike the similar options in the Linux kernel. Do not
> + set these options unless they apply!
> +
> - Linux Kernel Interface:
> CONFIG_CLOCKS_IN_MHZ
>
> diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
> index 6b59529d..30f02d3 100644
> --- a/arch/arm/cpu/armv7/start.S
> +++ b/arch/arm/cpu/armv7/start.S
> @@ -309,6 +309,25 @@ ENTRY(cpu_init_cp15)
> orr r0, r0, #0x00001000 @ set bit 12 (I) I-cache
> #endif
> mcr p15, 0, r0, c1, c0, 0
> +
> +#ifdef CONFIG_ARM_ERRATA_742230
> + mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
> + orr r0, r0, #1 << 4 @ set bit #4
> + mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
> +#endif
> +
> +#ifdef CONFIG_ARM_ERRATA_743622
> + mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
> + orr r0, r0, #1 << 6 @ set bit #6
> + mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
> +#endif
> +
> +#ifdef CONFIG_ARM_ERRATA_751472
> + mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register
> + orr r0, r0, #1 << 11 @ set bit #11
> + mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
> +#endif
> +
> mov pc, lr @ back to my caller
> ENDPROC(cpu_init_cp15)
>
Applied to u-boot-arm/master, thanks!
Amicalement,
--
Albert.
prev parent reply other threads:[~2013-03-15 5:58 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-26 22:28 [U-Boot] [PATCH 1/3] ARM: implement some Cortex-A9 errata workarounds Stephen Warren
2013-02-26 22:28 ` [U-Boot] [PATCH 2/3] ARM: tegra: enable some CPU " Stephen Warren
2013-03-15 5:59 ` Albert ARIBAUD
2013-02-26 22:28 ` [U-Boot] [PATCH 3/3] ARM: mx6: use common CPU errata config options Stephen Warren
2013-02-27 0:15 ` Fabio Estevam
2013-02-27 2:44 ` Liu Hui-R64343
2013-03-07 17:24 ` Stefano Babic
2013-03-07 19:19 ` Stephen Warren
2013-03-08 8:12 ` Stefano Babic
2013-02-28 0:30 ` [U-Boot] [PATCH 1/3] ARM: implement some Cortex-A9 errata workarounds Simon Glass
2013-02-28 0:36 ` Stephen Warren
2013-02-28 0:38 ` Simon Glass
2013-02-28 17:08 ` Stephen Warren
2013-03-01 21:53 ` Stephen Warren
2013-03-01 23:02 ` Tom Warren
2013-03-04 16:30 ` Tom Warren
2013-03-04 18:00 ` Albert ARIBAUD
2013-03-04 19:07 ` Tom Warren
2013-03-15 5:58 ` Albert ARIBAUD [this message]
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