From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:40333) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UKRXq-00010B-Dm for qemu-devel@nongnu.org; Tue, 26 Mar 2013 06:56:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UKRXj-0000of-ET for qemu-devel@nongnu.org; Tue, 26 Mar 2013 06:55:58 -0400 Received: from moutng.kundenserver.de ([212.227.17.8]:65137) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UKRXj-0000o8-2A for qemu-devel@nongnu.org; Tue, 26 Mar 2013 06:55:51 -0400 From: Arnd Bergmann Date: Tue, 26 Mar 2013 10:54:59 +0000 References: <1364293331-8722-1-git-send-email-peter.maydell@linaro.org> <1364293331-8722-8-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1364293331-8722-8-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-15" Content-Transfer-Encoding: 7bit Message-Id: <201303261054.59928.arnd@arndb.de> Subject: Re: [Qemu-devel] [PATCH v2 07/11] versatile_pci: Implement the correct PCI IRQ mapping List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: "Michael S. Tsirkin" , patches@linaro.org, Will Deacon , qemu-devel@nongnu.org, Paul Brook , Andreas =?iso-8859-15?q?F=E4rber?= , Aurelien Jarno On Tuesday 26 March 2013, Peter Maydell wrote: > > Implement the correct IRQ mapping for the Versatile PCI controller; it > differs between realview and versatile boards, but the previous QEMU > implementation was correct only for the first PCI card on a versatile > board, since we weren't swizzling IRQs based on the slot number. > > Since this change would otherwise break any uses of PCI on Linux kernels > which have an equivalent bug (since they have effectively only been > tested against QEMU, not real hardware), we implement a mechanism > for automatically detecting those broken kernels and switching back > to the old mapping. This works by looking at the values the kernel > writes to the PCI_INTERRUPT_LINE register in the config space, which > is effectively the interrupt number the kernel expects the device > to be using. If this doesn't match reality we use the broken mapping. > > Signed-off-by: Peter Maydell Yes, very good. We will probably introduce sparse irq support on versatile in the near future, and then the value we write into the PCI_INTERRUPT_LINE field will become arbitrary from qemu's point of view, but I will make sure that we fix the interrupt mapping in the kernel at the same time so we always fall into the "s->broken_irq_mapping = false;" case. We also need to find a way to make the new kernel work with an old qemu, and I think we can do that by using the versatile-dt board type with a PCI device node that sets all four lines to 27, while using the actual interrupt lines for the default versatile device tree. Arnd