From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915: implement ibx_hpd_irq_setup Date: Wed, 27 Mar 2013 16:03:16 +0200 Message-ID: <20130327140316.GA4469@intel.com> References: <1364341470-1106-1-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 406B3E618F for ; Wed, 27 Mar 2013 07:03:20 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1364341470-1106-1-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: Egbert Eich , Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Wed, Mar 27, 2013 at 12:44:30AM +0100, Daniel Vetter wrote: > Due to the irq setup rework in 3.9 Egbert's hpd rework blows up on > pch-split platforms. The new init sequence is: > = > - irq enabling > - modeset init > - hpd setup > = > We need to move around the ibx setup a bit to fix this. > = > This needs to be squashed into a commit on dinq. > = > Cc: Egbert Eich > Cc: Jesse Barnes > Signed-off-by: Daniel Vetter > --- > drivers/gpu/drm/i915/i915_irq.c | 21 ++++++++++++++++++--- > 1 file changed, 18 insertions(+), 3 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_= irq.c > index 43436e0..1279a44 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -2084,7 +2084,7 @@ static void ibx_enable_hotplug(struct drm_device *d= ev) > I915_WRITE(PCH_PORT_HOTPLUG, hotplug); > } > = > -static void ibx_irq_postinstall(struct drm_device *dev) > +static void ibx_hpd_irq_setup(struct drm_device *dev) > { > drm_i915_private_t *dev_priv =3D (drm_i915_private_t *) dev->dev_privat= e; > struct drm_mode_config *mode_config =3D &dev->mode_config; > @@ -2095,12 +2095,10 @@ static void ibx_irq_postinstall(struct drm_device= *dev) > mask &=3D ~SDE_HOTPLUG_MASK; > list_for_each_entry(intel_encoder, &mode_config->encoder_list, base.he= ad) > mask |=3D hpd_ibx[intel_encoder->hpd_pin]; > - mask |=3D SDE_GMBUS | SDE_AUX_MASK; > } else { > mask &=3D ~SDE_HOTPLUG_MASK_CPT; > list_for_each_entry(intel_encoder, &mode_config->encoder_list, base.he= ad) > mask |=3D hpd_cpt[intel_encoder->hpd_pin]; > - mask |=3D SDE_GMBUS_CPT | SDE_AUX_MASK_CPT; > } > I915_WRITE(SDEIIR, I915_READ(SDEIIR)); > I915_WRITE(SDEIMR, ~mask); > @@ -2110,6 +2108,21 @@ static void ibx_irq_postinstall(struct drm_device = *dev) > ibx_enable_hotplug(dev); > } > = > +static void ibx_irq_postinstall(struct drm_device *dev) > +{ > + drm_i915_private_t *dev_priv =3D (drm_i915_private_t *) dev->dev_privat= e; > + u32 mask =3D I915_READ(SDEIER); > + > + if (HAS_PCH_IBX(dev)) > + mask |=3D SDE_GMBUS | SDE_AUX_MASK; > + else > + mask |=3D SDE_GMBUS_CPT | SDE_AUX_MASK_CPT; > + I915_WRITE(SDEIIR, I915_READ(SDEIIR)); > + I915_WRITE(SDEIMR, ~mask); > + I915_WRITE(SDEIER, mask); > + POSTING_READ(SDEIER); > +} Should we clear just the HPD bits here? Then again, I suppose enable_hotplug_processing should make sure we don't do aux/gmbus transfers at the same time, so maybe it doesn't matter. But now I started to wondee what are chances that we'd get some other interrupt while executing this function. That could lead to a corrupted SDEIER now that the irq handler touches it as well. > + > static int ironlake_irq_postinstall(struct drm_device *dev) > { > drm_i915_private_t *dev_priv =3D (drm_i915_private_t *) dev->dev_privat= e; > @@ -2960,6 +2973,7 @@ void intel_irq_init(struct drm_device *dev) > dev->driver->irq_uninstall =3D ironlake_irq_uninstall; > dev->driver->enable_vblank =3D ivybridge_enable_vblank; > dev->driver->disable_vblank =3D ivybridge_disable_vblank; > + dev_priv->display.hpd_irq_setup =3D ibx_hpd_irq_setup; > } else if (HAS_PCH_SPLIT(dev)) { > dev->driver->irq_handler =3D ironlake_irq_handler; > dev->driver->irq_preinstall =3D ironlake_irq_preinstall; > @@ -2967,6 +2981,7 @@ void intel_irq_init(struct drm_device *dev) > dev->driver->irq_uninstall =3D ironlake_irq_uninstall; > dev->driver->enable_vblank =3D ironlake_enable_vblank; > dev->driver->disable_vblank =3D ironlake_disable_vblank; > + dev_priv->display.hpd_irq_setup =3D ibx_hpd_irq_setup; > } else { > if (INTEL_INFO(dev)->gen =3D=3D 2) { > dev->driver->irq_preinstall =3D i8xx_irq_preinstall; > -- = > 1.7.11.7 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC