From mboxrd@z Thu Jan 1 00:00:00 1970 From: Joerg Roedel Subject: Re: [PATCH 4/5 v11] iommu/fsl: Add additional iommu attributes required by the PAMU driver. Date: Tue, 2 Apr 2013 17:10:12 +0200 Message-ID: <20130402151011.GH15687@8bytes.org> References: <1364500442-20927-1-git-send-email-Varun.Sethi@freescale.com> <1364500442-20927-5-git-send-email-Varun.Sethi@freescale.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <1364500442-20927-5-git-send-email-Varun.Sethi-KZfg59tc24xl57MIdRCFDg@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: Varun Sethi Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, galak-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org, stuart.yoder-KZfg59tc24xl57MIdRCFDg@public.gmane.org, iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, benh-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org, scottwood-KZfg59tc24xl57MIdRCFDg@public.gmane.org, linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org List-Id: iommu@lists.linux-foundation.org On Fri, Mar 29, 2013 at 01:24:01AM +0530, Varun Sethi wrote: > +/* cache stash targets */ > +enum stash_target { > + IOMMU_ATTR_CACHE_L1 = 1, > + IOMMU_ATTR_CACHE_L2, > + IOMMU_ATTR_CACHE_L3, > +}; > + > +/* This attribute corresponds to IOMMUs capable of generating > + * a stash transaction. A stash transaction is typically a > + * hardware initiated prefetch of data from memory to cache. > + * This attribute allows configuring stashig specific parameters > + * in the IOMMU hardware. > + */ > + > +struct iommu_stash_attribute { > + u32 cpu; /* cpu number */ > + u32 cache; /* cache to stash to: L1,L2,L3 */ > +}; > + I would prefer these PAMU specific enum and struct to be in a pamu-specific iommu-header. Joerg From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.8bytes.org (8bytes.org [85.214.48.195]) by ozlabs.org (Postfix) with ESMTP id E8B9C2C0151 for ; Wed, 3 Apr 2013 02:10:16 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by mail.8bytes.org (Postfix) with SMTP id 9EAED12B085 for ; Tue, 2 Apr 2013 17:10:14 +0200 (CEST) Date: Tue, 2 Apr 2013 17:10:12 +0200 From: Joerg Roedel To: Varun Sethi Subject: Re: [PATCH 4/5 v11] iommu/fsl: Add additional iommu attributes required by the PAMU driver. Message-ID: <20130402151011.GH15687@8bytes.org> References: <1364500442-20927-1-git-send-email-Varun.Sethi@freescale.com> <1364500442-20927-5-git-send-email-Varun.Sethi@freescale.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <1364500442-20927-5-git-send-email-Varun.Sethi@freescale.com> Cc: linux-kernel@vger.kernel.org, stuart.yoder@freescale.com, iommu@lists.linux-foundation.org, scottwood@freescale.com, linuxppc-dev@lists.ozlabs.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Fri, Mar 29, 2013 at 01:24:01AM +0530, Varun Sethi wrote: > +/* cache stash targets */ > +enum stash_target { > + IOMMU_ATTR_CACHE_L1 = 1, > + IOMMU_ATTR_CACHE_L2, > + IOMMU_ATTR_CACHE_L3, > +}; > + > +/* This attribute corresponds to IOMMUs capable of generating > + * a stash transaction. A stash transaction is typically a > + * hardware initiated prefetch of data from memory to cache. > + * This attribute allows configuring stashig specific parameters > + * in the IOMMU hardware. > + */ > + > +struct iommu_stash_attribute { > + u32 cpu; /* cpu number */ > + u32 cache; /* cache to stash to: L1,L2,L3 */ > +}; > + I would prefer these PAMU specific enum and struct to be in a pamu-specific iommu-header. Joerg From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932646Ab3DBPKU (ORCPT ); Tue, 2 Apr 2013 11:10:20 -0400 Received: from 8bytes.org ([85.214.48.195]:53874 "EHLO mail.8bytes.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932574Ab3DBPKP (ORCPT ); Tue, 2 Apr 2013 11:10:15 -0400 Date: Tue, 2 Apr 2013 17:10:12 +0200 From: Joerg Roedel To: Varun Sethi Cc: stuart.yoder@freescale.com, scottwood@freescale.com, iommu@lists.linux-foundation.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, galak@kernel.crashing.org, benh@kernel.crashing.org Subject: Re: [PATCH 4/5 v11] iommu/fsl: Add additional iommu attributes required by the PAMU driver. Message-ID: <20130402151011.GH15687@8bytes.org> References: <1364500442-20927-1-git-send-email-Varun.Sethi@freescale.com> <1364500442-20927-5-git-send-email-Varun.Sethi@freescale.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1364500442-20927-5-git-send-email-Varun.Sethi@freescale.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-DSPAM-Result: Whitelisted X-DSPAM-Processed: Tue Apr 2 17:10:14 2013 X-DSPAM-Confidence: 0.9995 X-DSPAM-Probability: 0.0000 X-DSPAM-Signature: 515af4d623672050420500 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Mar 29, 2013 at 01:24:01AM +0530, Varun Sethi wrote: > +/* cache stash targets */ > +enum stash_target { > + IOMMU_ATTR_CACHE_L1 = 1, > + IOMMU_ATTR_CACHE_L2, > + IOMMU_ATTR_CACHE_L3, > +}; > + > +/* This attribute corresponds to IOMMUs capable of generating > + * a stash transaction. A stash transaction is typically a > + * hardware initiated prefetch of data from memory to cache. > + * This attribute allows configuring stashig specific parameters > + * in the IOMMU hardware. > + */ > + > +struct iommu_stash_attribute { > + u32 cpu; /* cpu number */ > + u32 cache; /* cache to stash to: L1,L2,L3 */ > +}; > + I would prefer these PAMU specific enum and struct to be in a pamu-specific iommu-header. Joerg