From: Gleb Natapov <gleb@redhat.com>
To: Yang Zhang <yang.z.zhang@intel.com>
Cc: kvm@vger.kernel.org, mtosatti@redhat.com,
xiantao.zhang@intel.com, jun.nakajima@intel.com
Subject: Re: [PATCH v7 5/7] KVM: Set TMR when programming ioapic entry
Date: Sun, 7 Apr 2013 17:10:14 +0300 [thread overview]
Message-ID: <20130407141014.GX17919@redhat.com> (raw)
In-Reply-To: <1364787155-3208-6-git-send-email-yang.z.zhang@intel.com>
On Mon, Apr 01, 2013 at 11:32:33AM +0800, Yang Zhang wrote:
> From: Yang Zhang <yang.z.zhang@Intel.com>
>
> We already know the trigger mode of a given interrupt when programming
> the ioapice entry. So it's not necessary to set it in each interrupt
> delivery.
>
> Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com>
> ---
> arch/x86/kvm/lapic.c | 15 +++++++++------
> arch/x86/kvm/lapic.h | 1 +
> arch/x86/kvm/x86.c | 6 +++++-
> virt/kvm/ioapic.c | 9 +++++++--
> virt/kvm/ioapic.h | 3 ++-
> 5 files changed, 24 insertions(+), 10 deletions(-)
>
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index ce8d6f6..686afee 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -458,6 +458,15 @@ static inline int apic_find_highest_isr(struct kvm_lapic *apic)
> return result;
> }
>
> +void kvm_apic_update_tmr(struct kvm_vcpu *vcpu, u32 *tmr)
> +{
> + struct kvm_lapic *apic = vcpu->arch.apic;
> + int i;
> +
> + for (i = 0; i < 8; i++)
> + apic_set_reg(apic, APIC_TMR + 0x10 * i, tmr[i]);
> +}
> +
> static void apic_update_ppr(struct kvm_lapic *apic)
> {
> u32 tpr, isrv, ppr, old_ppr;
> @@ -647,12 +656,6 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
> if (unlikely(!apic_enabled(apic)))
> break;
>
> - if (trig_mode) {
> - apic_debug("level trig mode for vector %d", vector);
> - apic_set_vector(vector, apic->regs + APIC_TMR);
> - } else
> - apic_clear_vector(vector, apic->regs + APIC_TMR);
> -
> result = !apic_test_and_set_irr(vector, apic);
> trace_kvm_apic_accept_irq(vcpu->vcpu_id, delivery_mode,
> trig_mode, vector, !result);
> diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
> index baa20cf..599076e 100644
> --- a/arch/x86/kvm/lapic.h
> +++ b/arch/x86/kvm/lapic.h
> @@ -53,6 +53,7 @@ void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value);
> u64 kvm_lapic_get_base(struct kvm_vcpu *vcpu);
> void kvm_apic_set_version(struct kvm_vcpu *vcpu);
>
> +void kvm_apic_update_tmr(struct kvm_vcpu *vcpu, u32 *tmr);
> int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest);
> int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda);
> int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq);
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 64241b6..6ad7760 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -5650,14 +5650,18 @@ static void kvm_gen_update_masterclock(struct kvm *kvm)
> static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
> {
> u64 eoi_exit_bitmap[4];
> + u64 tmr[4];
>
> if (!kvm_lapic_enabled(vcpu))
> return;
>
> memset(eoi_exit_bitmap, 0, 32);
> + memset(tmr, 0, 32);
>
> - kvm_ioapic_scan_entry(vcpu, (unsigned long *)eoi_exit_bitmap);
> + kvm_ioapic_scan_entry(vcpu, (unsigned long *)eoi_exit_bitmap,
> + (unsigned long *)tmr);
> kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
> + kvm_apic_update_tmr(vcpu, (u32 *)tmr);
Again, cast it inside if needed.
> }
>
> static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
> diff --git a/virt/kvm/ioapic.c b/virt/kvm/ioapic.c
> index f37c889..b704b67 100644
> --- a/virt/kvm/ioapic.c
> +++ b/virt/kvm/ioapic.c
> @@ -120,7 +120,8 @@ static void update_handled_vectors(struct kvm_ioapic *ioapic)
> }
>
> void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu,
> - unsigned long *eoi_exit_bitmap)
> + unsigned long *eoi_exit_bitmap,
> + unsigned long *tmr)
> {
> struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
> union kvm_ioapic_redirect_entry *e;
> @@ -135,8 +136,12 @@ void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu,
> kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC,
> index))) {
> if (kvm_apic_match_dest(vcpu, NULL, 0,
> - e->fields.dest_id, e->fields.dest_mode))
> + e->fields.dest_id, e->fields.dest_mode)) {
> +
> __set_bit(irqe.vector, eoi_exit_bitmap);
> + if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG)
> + __set_bit(irqe.vector, tmr);
> + }
> }
> }
> spin_unlock(&ioapic->lock);
> diff --git a/virt/kvm/ioapic.h b/virt/kvm/ioapic.h
> index e3538ba..280b4fc 100644
> --- a/virt/kvm/ioapic.h
> +++ b/virt/kvm/ioapic.h
> @@ -84,6 +84,7 @@ int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);
> int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);
> void kvm_vcpu_scan_ioapic(struct kvm *kvm);
> void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu,
> - unsigned long *eoi_exit_bitmap);
> + unsigned long *eoi_exit_bitmap,
> + unsigned long *tmr);
>
> #endif
> --
> 1.7.1
--
Gleb.
next prev parent reply other threads:[~2013-04-07 14:10 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-01 3:32 [PATCH v7 0/7] KVM: VMX: Add Posted Interrupt supporting Yang Zhang
2013-04-01 3:32 ` [PATCH v7 1/7] KVM: VMX: Enable acknowledge interupt on vmexit Yang Zhang
2013-04-01 3:32 ` [PATCH v7 2/7] KVM: VMX: Register a new IPI for posted interrupt Yang Zhang
2013-04-01 3:32 ` [PATCH v7 3/7] KVM: VMX: Check the posted interrupt capability Yang Zhang
2013-04-07 14:14 ` Gleb Natapov
2013-04-08 2:57 ` Zhang, Yang Z
2013-04-01 3:32 ` [PATCH v7 4/7] KVM: Call common update function when ioapic entry changed Yang Zhang
2013-04-07 13:33 ` Gleb Natapov
2013-04-07 14:00 ` Zhang, Yang Z
2013-04-07 14:05 ` Gleb Natapov
2013-04-08 4:10 ` Zhang, Yang Z
2013-04-01 3:32 ` [PATCH v7 5/7] KVM: Set TMR when programming ioapic entry Yang Zhang
2013-04-07 14:10 ` Gleb Natapov [this message]
2013-04-01 3:32 ` [PATCH v7 6/7] KVM: VMX: Add the algorithm of deliver posted interrupt Yang Zhang
2013-04-07 14:55 ` Gleb Natapov
2013-04-08 5:38 ` Zhang, Yang Z
2013-04-01 3:32 ` [PATCH v7 7/7] KVM: VMX: Use posted interrupt to deliver virtual interrupt Yang Zhang
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