From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915: Reject fence stride=0 on gen4+ Date: Tue, 9 Apr 2013 18:08:32 +0300 Message-ID: <20130409150832.GU4469@intel.com> References: <1365518805-23751-1-git-send-email-ville.syrjala@linux.intel.com> <20130409150118.GA2228@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 7F94AE6278 for ; Tue, 9 Apr 2013 08:08:36 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20130409150118.GA2228@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, Apr 09, 2013 at 05:01:18PM +0200, Daniel Vetter wrote: > On Tue, Apr 09, 2013 at 05:46:45PM +0300, ville.syrjala@linux.intel.com w= rote: > > From: Ville Syrj=E4l=E4 > > = > > Our checks for an invalid fence stride forgot to guard against > > zero stride on gen4+. Fix it. > > = > > Signed-off-by: Ville Syrj=E4l=E4 > = > This duplicates the tiny stride check a bit with the gen2/3 code. What > about > = > = > diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i91= 5/i915_gem_tiling.c > index c807eb9..b56185f 100644 > --- a/drivers/gpu/drm/i915/i915_gem_tiling.c > +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c > @@ -235,6 +235,9 @@ i915_tiling_ok(struct drm_device *dev, int stride, in= t size, int tiling_mode) > } > } > = > + if (stride < tile_width) > + return false; > + > /* 965+ just needs multiples of tile width */ > if (INTEL_INFO(dev)->gen >=3D 4) { > if (stride & (tile_width - 1)) > @@ -243,9 +246,6 @@ i915_tiling_ok(struct drm_device *dev, int stride, in= t size, int tiling_mode) > } > = > /* Pre-965 needs power of two tile widths */ > - if (stride < tile_width) > - return false; > - > if (stride & (stride - 1)) > return false; > = > instead? Looks OK. The same idea occured to me, but only after hitting enter. > -Daniel > = > > --- > > drivers/gpu/drm/i915/i915_gem_tiling.c | 2 ++ > > 1 file changed, 2 insertions(+) > > = > > diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i= 915/i915_gem_tiling.c > > index 139d17d..16ff6e7 100644 > > --- a/drivers/gpu/drm/i915/i915_gem_tiling.c > > +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c > > @@ -240,6 +240,8 @@ i915_tiling_ok(struct drm_device *dev, int stride, = int size, int tiling_mode) > > = > > /* 965+ just needs multiples of tile width */ > > if (INTEL_INFO(dev)->gen >=3D 4) { > > + if (stride < tile_width) > > + return false; > > if (stride & (tile_width - 1)) > > return false; > > return true; > > -- = > > 1.8.1.5 > > = > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > = > -- = > Daniel Vetter > Software Engineer, Intel Corporation > +41 (0) 79 365 57 48 - http://blog.ffwll.ch -- = Ville Syrj=E4l=E4 Intel OTC