From: Igor Mammedov <imammedo@redhat.com>
To: Eduardo Habkost <ehabkost@redhat.com>
Cc: aliguori@us.ibm.com, claudio.fontana@huawei.com,
qemu-devel@nongnu.org, aderumier@odiso.com,
lcapitulino@redhat.com, jfrei@linux.vnet.ibm.com,
yang.z.zhang@intel.com, pbonzini@redhat.com, afaerber@suse.de,
lig.fnst@cn.fujitsu.com, rth@twiddle.net
Subject: Re: [Qemu-devel] [PATCH 22/22] add cpu-add qmp command and implement CPU hot-add for target-i386
Date: Tue, 9 Apr 2013 23:05:26 +0200 [thread overview]
Message-ID: <20130409230526.080c7f03@thinkpad> (raw)
In-Reply-To: <20130409204621.GD11124@otherpad.lan.raisama.net>
On Tue, 9 Apr 2013 17:46:21 -0300
Eduardo Habkost <ehabkost@redhat.com> wrote:
> On Tue, Apr 09, 2013 at 10:19:11PM +0200, Igor Mammedov wrote:
> > On Fri, 5 Apr 2013 14:10:54 -0300
> > Eduardo Habkost <ehabkost@redhat.com> wrote:
> >
> > > On Fri, Apr 05, 2013 at 04:37:16PM +0200, Igor Mammedov wrote:
> > > [...]
> > > > diff --git a/qapi-schema.json b/qapi-schema.json
> > > > index db542f6..a760ed5 100644
> > > > --- a/qapi-schema.json
> > > > +++ b/qapi-schema.json
> > > > @@ -1387,6 +1387,17 @@
> > > > { 'command': 'cpu', 'data': {'index': 'int'} }
> > > >
> > > > ##
> > > > +# @cpu-add
> > > > +#
> > > > +# Adds CPU with specified id
> > > > +#
> > > > +# @id: cpu id of CPU to be created
> > >
> > > Can we have the semantics/constraints of "id" documented here? Is it an
> > > arbitrary ID chosen by the caller? Does it have to be the APIC ID? Does
> > it's generic function so documenting it as APIC ID is not appropriate.
> >
> > I for sure should document it on cpu-hotplug wiki page though, for x86 use
> > case for starters. i.e. how to use QMP to get a list of available/free IDs.
> > and in which order to use them.
> >
> > > it have to be the index of the CPU in the CPU list? How the IDs of
> > > existing CPUs set using "-smp" are allocated?
> > With current -smp implementation the same way as it was before,
> > and for migration to work hot-plugged CPU has to be the next unused APIC
> > ID in their sequence, so that target qemu could be started with "-smp n+1".
>
> The problem is that it's hard to find out what's the APIC ID for each
> CPU mentioned in the command-line.
>
> For example, if you use "-smp 18,cores=3,threads=3,maxcpus=36" thread ID
> will use 2 bits, core ID will use 2 bits, the APIC IDs on startup will
> be:
>
> online on startup:
> package 0, core 0: 0 1 2
> package 0, core 1: 4 5 6
> package 0, core 2: 8 9 10
> package 1, core 0: 16 17 18
> package 1, core 1: 20 21 22
> package 1, core 2: 24 25 26
>
> offline on startup:
> package 2, core 0: 32 33 34
> package 2, core 1: 36 37 38
> package 2, core 2: 40 41 42
> package 3, core 0: 48 49 50
> package 3, core 1: 52 53 54
> package 3, core 2: 56 57 58
>
>
> What should the caller do to find out the correct ID for each of the 36
> VCPUs? This should be clearly documented.
Patch 21/22 exposes all APIC IDs (including offline) as links via QOM
as /machine/icc-bridge/cpu[0..n]
And since in above sequence IDs are monotonously increasing it's enough to use
the next unused APIC ID to make -smp n+1 work.
>
>
> >
> > But -smp along with -numa should be reworked to allow specifying guest visible
> > CPU IDs for arbitrary CPU hotplug to work.
>
> I'm curious how you plan to make this work while keeping command-line
> compatibility. See the question I sent on my other message, about how to
> map the IDs used on -numa (that are "CPU indexes") to the IDs required
> by cpu-add.
It doesn't mean that we should stick to bad/insufficient interface forever.
We could add new one that does it right and keep old one for a time being for
compatibility.
>
> >
> > when we done with QOMifying CPUs it might be possible to use -device for them
> > and keeping -smp for compat/shorcut purposes.
> >
> > >
> > > I am looking at the code right now to understand how this implementation
> > > works, but the documentation could contain or point to documentation on
> > > how the "id" parameter is used and interpreted.
> > I'll add pointer to wiki and describe there target-i386 use-case.
>
> Thanks! Could you try to document it succintly inside qapi-schema.json
> as well? Maybe just a pointer to other documents would be useful.
It's very target specific, so separate document probably would make more sense.
> --
> Eduardo
>
--
Regards,
Igor
next prev parent reply other threads:[~2013-04-09 21:11 UTC|newest]
Thread overview: 77+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-05 14:36 [Qemu-devel] [PATCH 00/22 v2] target-i386: CPU hot-add with cpu-add QMP command Igor Mammedov
2013-04-05 14:36 ` [Qemu-devel] [PATCH 01/22] target-i386: consolidate error propagation in x86_cpu_realizefn() Igor Mammedov
2013-04-09 17:42 ` Andreas Färber
2013-04-05 14:36 ` [Qemu-devel] [PATCH 02/22] target-i386: split APIC creation from initialization " Igor Mammedov
2013-04-08 2:26 ` li guang
2013-04-08 18:16 ` Eduardo Habkost
2013-04-09 18:52 ` Andreas Färber
2013-04-05 14:36 ` [Qemu-devel] [PATCH 03/22] target-i386: split out CPU creation and features parsing into cpu_x86_create() Igor Mammedov
2013-04-08 18:30 ` Eduardo Habkost
2013-04-09 10:30 ` Paolo Bonzini
2013-04-09 10:33 ` Igor Mammedov
2013-04-09 14:02 ` Andreas Färber
2013-04-05 14:36 ` [Qemu-devel] [PATCH 04/22] cpu: Pass CPUState to *cpu_synchronize_post*() Igor Mammedov
2013-04-08 19:38 ` Eduardo Habkost
2013-04-05 14:36 ` [Qemu-devel] [PATCH 05/22] cpu: call cpu_synchronize_post_init() from CPUClass.realize() if hotplugged Igor Mammedov
2013-04-08 19:45 ` Eduardo Habkost
2013-04-09 10:13 ` Igor Mammedov
2013-04-09 11:17 ` Paolo Bonzini
2013-04-09 11:15 ` Paolo Bonzini
2013-04-05 14:36 ` [Qemu-devel] [PATCH 06/22] cpu: introduce CPUClass.resume() method Igor Mammedov
2013-04-08 2:27 ` li guang
2013-04-08 20:13 ` Eduardo Habkost
2013-04-09 10:26 ` Igor Mammedov
2013-04-09 13:21 ` Andreas Färber
2013-04-09 11:20 ` Paolo Bonzini
2013-04-10 12:57 ` Igor Mammedov
2013-04-05 14:36 ` [Qemu-devel] [PATCH 07/22] target-i386: kvmvapic: replace FROM_SYSBUS() with QOM type cast Igor Mammedov
2013-04-10 17:54 ` Andreas Färber
2013-04-05 14:37 ` [Qemu-devel] [PATCH 08/22] target-i386: ioapic: " Igor Mammedov
2013-04-08 2:13 ` li guang
2013-04-08 11:32 ` Igor Mammedov
2013-04-09 11:36 ` Paolo Bonzini
2013-04-10 0:21 ` li guang
2013-04-10 8:06 ` Paolo Bonzini
2013-04-10 16:12 ` Igor Mammedov
2013-04-10 18:12 ` Andreas Färber
2013-04-10 17:58 ` Andreas Färber
2013-04-05 14:37 ` [Qemu-devel] [PATCH 09/22] introduce CPU hot-plug notifier Igor Mammedov
2013-04-09 11:23 ` Paolo Bonzini
2013-04-05 14:37 ` [Qemu-devel] [PATCH 10/22] rtc: update rtc_cmos on CPU hot-plug Igor Mammedov
2013-04-05 14:37 ` [Qemu-devel] [PATCH 11/22] cpu: introduce get_firmware_id() method and override it for target-i386 Igor Mammedov
2013-04-08 2:02 ` li guang
2013-04-08 11:41 ` Igor Mammedov
2013-04-05 14:37 ` [Qemu-devel] [PATCH 12/22] cpu: add helper cpu_exists(), to check if CPU with specified id exists Igor Mammedov
2013-04-09 11:25 ` Paolo Bonzini
2013-04-05 14:37 ` [Qemu-devel] [PATCH 13/22] acpi_piix4: add infrastructure to send CPU hot-plug GPE to guest Igor Mammedov
2013-04-08 2:24 ` li guang
2013-04-08 11:47 ` Igor Mammedov
2013-04-05 14:37 ` [Qemu-devel] [PATCH 14/22] target-i386: introduce apic-id property Igor Mammedov
2013-04-09 11:26 ` Paolo Bonzini
2013-04-05 14:37 ` [Qemu-devel] [PATCH 15/22] introduce ICC bus/device/bridge Igor Mammedov
2013-04-05 14:37 ` [Qemu-devel] [PATCH 16/22] target-i386: cpu: attach ICC bus to CPU on its creation Igor Mammedov
2013-04-05 14:37 ` [Qemu-devel] [PATCH 17/22] target-i386: replace MSI_SPACE_SIZE with APIC_SPACE_SIZE Igor Mammedov
2013-04-05 14:37 ` [Qemu-devel] [PATCH 18/22] target-i386: move APIC to ICC bus Igor Mammedov
2013-04-05 16:15 ` Eduardo Habkost
2013-04-05 22:23 ` Igor Mammedov
2013-04-05 22:31 ` Igor Mammedov
2013-04-09 11:29 ` Paolo Bonzini
2013-04-05 14:37 ` [Qemu-devel] [PATCH 18/22] target-i386: move IOAPIC " Igor Mammedov
2013-04-09 11:33 ` Paolo Bonzini
2013-04-09 12:51 ` Igor Mammedov
2013-04-05 14:37 ` [Qemu-devel] [PATCH 19/22] target-i386: move APIC " Igor Mammedov
2013-04-09 12:47 ` Igor Mammedov
2013-04-05 14:37 ` [Qemu-devel] [PATCH 19/22] target-i386: move IOAPIC " Igor Mammedov
2013-04-05 14:37 ` [Qemu-devel] [PATCH 20/22] qdev: set device's parent before calling realize() down inheritance chain Igor Mammedov
2013-04-09 11:34 ` Paolo Bonzini
2013-04-05 14:37 ` [Qemu-devel] [PATCH 21/22] target-i386: expose all possible CPUs as /machine/icc-bridge/cpu[0..N] links Igor Mammedov
2013-04-05 14:37 ` [Qemu-devel] [PATCH 22/22] add cpu-add qmp command and implement CPU hot-add for target-i386 Igor Mammedov
2013-04-05 17:10 ` Eduardo Habkost
2013-04-05 17:24 ` Eduardo Habkost
2013-04-11 15:17 ` Igor Mammedov
2013-04-11 15:49 ` Eduardo Habkost
2013-04-09 20:19 ` Igor Mammedov
2013-04-09 20:46 ` Eduardo Habkost
2013-04-09 21:05 ` Igor Mammedov [this message]
2013-04-11 15:12 ` Eduardo Habkost
2013-04-11 15:37 ` Igor Mammedov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20130409230526.080c7f03@thinkpad \
--to=imammedo@redhat.com \
--cc=aderumier@odiso.com \
--cc=afaerber@suse.de \
--cc=aliguori@us.ibm.com \
--cc=claudio.fontana@huawei.com \
--cc=ehabkost@redhat.com \
--cc=jfrei@linux.vnet.ibm.com \
--cc=lcapitulino@redhat.com \
--cc=lig.fnst@cn.fujitsu.com \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
--cc=yang.z.zhang@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.