From: Aurelien Jarno <aurelien@aurel32.net>
To: Richard Henderson <rth@twiddle.net>
Cc: av1474@comtv.ru, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v4 16/33] tcg-ppc64: Use automatic implementation of ext32u_i64
Date: Sat, 13 Apr 2013 14:25:04 +0200 [thread overview]
Message-ID: <20130413122504.GS5000@ohm.aurel32.net> (raw)
In-Reply-To: <1365116186-19382-17-git-send-email-rth@twiddle.net>
On Thu, Apr 04, 2013 at 05:56:09PM -0500, Richard Henderson wrote:
> The enhancements to and immediate obviate this.
>
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
> tcg/ppc64/tcg-target.c | 5 -----
> tcg/ppc64/tcg-target.h | 6 +++---
> 2 files changed, 3 insertions(+), 8 deletions(-)
>
> diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
> index 1bd456a..71d72b4 100644
> --- a/tcg/ppc64/tcg-target.c
> +++ b/tcg/ppc64/tcg-target.c
> @@ -1686,10 +1686,6 @@ static void tcg_out_op (TCGContext *s, TCGOpcode opc, const TCGArg *args,
> tcg_out32 (s, c | RS (args[1]) | RA (args[0]));
> break;
>
> - case INDEX_op_ext32u_i64:
> - tcg_out_ext32u(s, args[0], args[1]);
> - break;
> -
> case INDEX_op_setcond_i32:
> tcg_out_setcond (s, TCG_TYPE_I32, args[3], args[0], args[1], args[2],
> const_args[2]);
> @@ -1796,7 +1792,6 @@ static const TCGTargetOpDef ppc_op_defs[] = {
> { INDEX_op_ext8s_i64, { "r", "r" } },
> { INDEX_op_ext16s_i64, { "r", "r" } },
> { INDEX_op_ext32s_i64, { "r", "r" } },
> - { INDEX_op_ext32u_i64, { "r", "r" } },
>
> { INDEX_op_setcond_i32, { "r", "r", "ri" } },
> { INDEX_op_setcond_i64, { "r", "r", "ri" } },
> diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h
> index f1c3067..a4078ae 100644
> --- a/tcg/ppc64/tcg-target.h
> +++ b/tcg/ppc64/tcg-target.h
> @@ -70,6 +70,9 @@ typedef enum {
> /* optional instructions automatically implemented */
> #define TCG_TARGET_HAS_ext8u_i32 0 /* andi */
> #define TCG_TARGET_HAS_ext16u_i32 0
> +#define TCG_TARGET_HAS_ext8u_i64 0
> +#define TCG_TARGET_HAS_ext16u_i64 0
> +#define TCG_TARGET_HAS_ext32u_i64 0
>
> /* optional instructions */
> #define TCG_TARGET_HAS_div_i32 1
> @@ -97,9 +100,6 @@ typedef enum {
> #define TCG_TARGET_HAS_ext8s_i64 1
> #define TCG_TARGET_HAS_ext16s_i64 1
> #define TCG_TARGET_HAS_ext32s_i64 1
> -#define TCG_TARGET_HAS_ext8u_i64 0
> -#define TCG_TARGET_HAS_ext16u_i64 0
> -#define TCG_TARGET_HAS_ext32u_i64 1
> #define TCG_TARGET_HAS_bswap16_i64 0
> #define TCG_TARGET_HAS_bswap32_i64 0
> #define TCG_TARGET_HAS_bswap64_i64 0
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
next prev parent reply other threads:[~2013-04-13 12:25 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-04 22:55 [Qemu-devel] [PATCH v4 00/33] Modernize tcg/ppc64 Richard Henderson
2013-04-04 22:55 ` [Qemu-devel] [PATCH v4 01/33] disas: Disassemble all ppc insns for the host Richard Henderson
2013-04-04 22:55 ` [Qemu-devel] [PATCH v4 02/33] tcg-ppc64: Use TCGReg everywhere Richard Henderson
2013-04-04 22:55 ` [Qemu-devel] [PATCH v4 03/33] tcg-ppc64: Introduce and use tcg_out_rlw Richard Henderson
2013-04-04 22:55 ` [Qemu-devel] [PATCH v4 04/33] tcg-ppc64: Introduce and use tcg_out_ext32u Richard Henderson
2013-04-04 22:55 ` [Qemu-devel] [PATCH v4 05/33] tcg-ppc64: Introduce and use tcg_out_shli64 Richard Henderson
2013-04-04 22:55 ` [Qemu-devel] [PATCH v4 06/33] tcg-ppc64: Introduce and use tcg_out_shri64 Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 07/33] tcg-ppc64: Introduce and use TAI and SAI Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 08/33] tcg-ppc64: Fix setcond_i32 Richard Henderson
2013-04-15 7:54 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 09/33] tcg-ppc64: Cleanup tcg_out_movi Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 10/33] tcg-ppc64: Rearrange integer constant constraints Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 11/33] tcg-ppc64: Improve constant add and sub ops Richard Henderson
2013-04-15 7:54 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 12/33] tcg-ppc64: Allow constant first argument to sub Richard Henderson
2013-04-15 7:59 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 13/33] tcg-ppc64: Tidy or and xor patterns Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 14/33] tcg-ppc64: Improve and_i32 with constant Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 15/33] tcg-ppc64: Improve and_i64 " Richard Henderson
2013-04-13 12:24 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 16/33] tcg-ppc64: Use automatic implementation of ext32u_i64 Richard Henderson
2013-04-13 12:25 ` Aurelien Jarno [this message]
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 17/33] tcg-ppc64: Streamline qemu_ld/st insn selection Richard Henderson
2013-04-13 12:25 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 18/33] tcg-ppc64: Implement rotates Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 19/33] tcg-ppc64: Implement bswap16 and bswap32 Richard Henderson
2013-04-15 7:59 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 20/33] tcg-ppc64: Implement bswap64 Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 21/33] tcg-ppc64: Implement compound logicals Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 22/33] tcg-ppc64: Handle constant inputs for some " Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 23/33] tcg-ppc64: Implement deposit Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 24/33] tcg-ppc64: Use I constraint for mul Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 25/33] tcg-ppc64: Cleanup i32 constants to tcg_out_cmp Richard Henderson
2013-04-15 8:01 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 26/33] tcg-ppc64: Use TCGType throughout compares Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 27/33] tcg-ppc64: Use MFOCRF instead of MFCR Richard Henderson
2013-04-15 8:02 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 28/33] tcg-ppc64: Use ISEL for setcond Richard Henderson
2013-04-15 8:13 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 29/33] tcg-ppc64: Implement movcond Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 30/33] tcg-ppc64: Use getauxval for ISA detection Richard Henderson
2013-04-05 16:59 ` Richard Henderson
2013-04-15 8:13 ` Aurelien Jarno
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 31/33] tcg-ppc64: Implement add2/sub2_i64 Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 32/33] tcg-ppc64: Implement mulu2/muls2_i64 Richard Henderson
2013-04-04 22:56 ` [Qemu-devel] [PATCH v4 33/33] tcg-ppc64: Handle deposit of zero Richard Henderson
2013-04-15 8:14 ` Aurelien Jarno
2013-04-13 12:24 ` [Qemu-devel] [PATCH v4 00/33] Modernize tcg/ppc64 Aurelien Jarno
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20130413122504.GS5000@ohm.aurel32.net \
--to=aurelien@aurel32.net \
--cc=av1474@comtv.ru \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.