From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:41788) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UQzgT-0007eP-IL for qemu-devel@nongnu.org; Sat, 13 Apr 2013 08:35:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UQzgS-0001FO-AK for qemu-devel@nongnu.org; Sat, 13 Apr 2013 08:35:57 -0400 Received: from hall.aurel32.net ([2001:470:1f15:c4f::1]:40408) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UQzgR-0001FE-OU for qemu-devel@nongnu.org; Sat, 13 Apr 2013 08:35:55 -0400 Date: Sat, 13 Apr 2013 14:35:51 +0200 From: Aurelien Jarno Message-ID: <20130413123551.GE9922@ohm.aurel32.net> References: <1365519084-4229-1-git-send-email-afaerber@suse.de> <1365519084-4229-3-git-send-email-afaerber@suse.de> <51644B85.705@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <51644B85.705@suse.de> Subject: Re: [Qemu-devel] [PATCH qom-cpu 2/2] sh7750: Change cpu field type to SuperHCPU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Andreas =?iso-8859-15?Q?F=E4rber?= Cc: Peter Maydell , qemu-devel@nongnu.org On Tue, Apr 09, 2013 at 07:10:29PM +0200, Andreas Färber wrote: > Am 09.04.2013 17:29, schrieb Peter Maydell: > > On 9 April 2013 15:51, Andreas Färber wrote: > >> This brings us a step closer to QOM'ified SH7750 SoC and > >> fixes b350ab75 (target-sh4: Move PVR/PRR/CVR into SuperHCPUClass) > >> assuming SuperHCPU type for SUPERH_CPU_GET_CLASS(). > >> > >> Fix Coding Style issues while at it (indentation, braces). > >> > >> Reported-by: Peter Maydell > >> Signed-off-by: Andreas Färber > > > > Reviewed-by: Peter Maydell > > > > My test sh4 image boots again now. > > Thanks, applied both to qom-cpu: > https://github.com/afaerber/qemu-cpu/commits/qom-cpu > > If Aurélien wants to apply these directly, that should work, too. > Thanks for the patches. Given the soft-freeze is approaching and we want it to be fixed for the release, I have applied them. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net