From: Aurelien Jarno <aurelien@aurel32.net>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
Alexander Graf <agraf@suse.de>
Subject: Re: [Qemu-devel] [PATCH 01/10] target-ppc: optimize fabs, fnabs, fneg
Date: Mon, 15 Apr 2013 08:16:55 +0200 [thread overview]
Message-ID: <20130415061655.GA11241@ohm.aurel32.net> (raw)
In-Reply-To: <CAFEAcA-edueScvjARpeydP+zVL_-MapD=q8ztt4DijU8CPFo_Q@mail.gmail.com>
On Sat, Apr 13, 2013 at 02:20:10PM +0100, Peter Maydell wrote:
> On 13 April 2013 13:47, Aurelien Jarno <aurelien@aurel32.net> wrote:
> > fabs, fnabs and fneg are just flipping the bit sign of an FP register,
> > this can be implemented in TCG instead of using softfloat.
> > + tcg_gen_andi_i64(cpu_fpr[rD(ctx->opcode)], cpu_fpr[rB(ctx->opcode)],
> > + ~(1LL << 63));
>
> "1LL << 63" is undefined behaviour; you probably want "1ULL << 63".
>
Thanks, I'll fix that in the next version.
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
next prev parent reply other threads:[~2013-04-15 6:17 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-13 12:47 [Qemu-devel] [PATCH 00/10] target-ppc: emulate Power ISA 2.05 instructions Aurelien Jarno
2013-04-13 12:47 ` [Qemu-devel] [PATCH 01/10] target-ppc: optimize fabs, fnabs, fneg Aurelien Jarno
2013-04-13 13:20 ` Peter Maydell
2013-04-15 6:16 ` Aurelien Jarno [this message]
2013-04-13 12:47 ` [Qemu-devel] [PATCH 02/10] disas: Disassemble all ppc insns for the guest Aurelien Jarno
2013-04-17 14:15 ` Richard Henderson
2013-04-13 12:47 ` [Qemu-devel] [PATCH 03/10] target-ppc: add instruction flags for Book I 2.05 Aurelien Jarno
2013-04-17 14:16 ` Richard Henderson
2013-04-13 12:47 ` [Qemu-devel] [PATCH 04/10] target-ppc: emulate cmpb instruction Aurelien Jarno
2013-04-17 14:17 ` Richard Henderson
2013-04-13 12:47 ` [Qemu-devel] [PATCH 05/10] target-ppc: emulate prtyw and prtyd instructions Aurelien Jarno
2013-04-17 14:19 ` Richard Henderson
2013-04-13 12:47 ` [Qemu-devel] [PATCH 06/10] target-ppc: emulate fcpsgn instruction Aurelien Jarno
2013-04-17 14:21 ` Richard Henderson
2013-04-13 12:47 ` [Qemu-devel] [PATCH 07/10] target-ppc: emulate lfiwax instruction Aurelien Jarno
2013-04-17 14:22 ` Richard Henderson
2013-04-13 12:47 ` [Qemu-devel] [PATCH 08/10] target-ppc: emulate load doubleword pair instructions Aurelien Jarno
2013-04-17 14:25 ` Richard Henderson
2013-04-13 12:47 ` [Qemu-devel] [PATCH 09/10] target-ppc: emulate store " Aurelien Jarno
2013-04-17 14:26 ` Richard Henderson
2013-04-19 18:54 ` Aurelien Jarno
2013-04-13 12:47 ` [Qemu-devel] [PATCH 10/10] target-ppc: add support for extended mtfsf/mtfsfi forms Aurelien Jarno
2013-04-19 15:35 ` [Qemu-devel] [PATCH 00/10] target-ppc: emulate Power ISA 2.05 instructions Alexander Graf
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20130415061655.GA11241@ohm.aurel32.net \
--to=aurelien@aurel32.net \
--cc=agraf@suse.de \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.